Intentionally mismatched mirror process inverse current source

Details Intentionally mismatched mirror process inverse current source Intentionally mismatched mirror process inverse current source

1998-02-13

1999-08-17

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

External effect

Temperature

327513, 327530, 323315, H01L 3500

Patent

active

059399333

ABSTRACT:
An MOS transistor current source has a current mirror constructed of an MOS transistor pair with the transistors having intentionally mismatched W/L aspect ratios such that the intentionally mismatched transistor pair develops a mirror current that varies in an inversely proportional fashion to the process. A precision reference current drives a first, short channel device of the pair which develops a bias voltage which is coupled to the gate terminal of a second, long channel device of the pair. The long channel device conducts a current in operative response to the bias voltage, which current will increase or decrease a corresponding amount in an inversely proportional relationship to the drive strength of the short channel device.

REFERENCES:
patent: 5038053 (1991-08-01), Djenguerian et al.
patent: 5757175 (1998-05-01), Morishita et al.
patent: 5783936 (1998-07-01), Girard et al.

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