System for facilitating alignment of silicon die

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor

Reexamination Certificate

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Details

C324S719000

Reexamination Certificate

active

06649443

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to manufacturing integrated circuits packages. More specifically, the invention relates to aligning a spacer to a silicon die.
2. Description of the Related Art
Digital circuits, no matter how complex, are composed of a small group of identical building blocks. These blocks can be gates or special circuits or other structures for which gates are less suitable. But the majority of digital circuits are composed of gates or combinations of gates. Gates are combinations of high-speed electronic switches, such as transistors.
A microprocessor is a central processing unit of a computer or other device using thousands (or millions) of gates, flip-flops and memory cells. Flip-flops and memory cells are modified versions of basic logic gates.
It is known to manufacture an integrated circuit using conductors separated by a semiconductor. Circuits are fabricated on a semiconductor by selectively altering the conductivity of the semiconductor material. Various conductivity levels correspond to elements of a transistor, diode, resistor, or small capacitor. Individual components such as transistors, diodes, resistors, and small capacitors are formed on small chips of silicon. These individual components are interconnected by wiring patterns (typically aluminum, copper or gold).
An integrated circuit is then included in a larger structure, known as integrated circuit package, that provides electrical connections between the integrated circuit and the next level assembly. The integrated circuit package also serves structural functions. Integrated circuit packages are then mounted on printed (or wired) circuit boards, which are used to assemble electronic systems such as personal computers and other data processing equipment.
It is known to manufacture an integrated circuit package using a layer of silicon and a layer of a substrate. The substrate layer can be ceramic or another material with the necessary electrical insulating properties, such as a ceramic. Heat is applied during the manufacturing process to bond the silicon layer to the substrate layer. Uneven cooling of the silicon and substrate layers (sometimes referred to as the “package”) could produce failures in the package. Uniform cooling minimizes the number of failures in the package.
After bonding the silicon layer to the substrate layer a heat spreader (sometimes referred to as a “thermal lid” or simply a “lid”) is attached to the package. The thermal lid serves to conduct heat from the integrated circuit package to the environment and thus facilitates even cooling. The lid is typically formed from a metal due to the high thermal conductivity of metals. Typically, neither the thermal lid nor the silicon surface is sufficiently flat to provide an efficient heat exchange interface. Thus, imperfections in the surface of the thermal lid and the surface of the silicon prevent complete surface contact between the surface of the silicon and the surface of the thermal lid. The incomplete surface contact is an impediment to heat transfer, which in turn causes failures of the package.
The lid can be used in conjunction with a heat sink. The heat sink is provided with fins or other external surfaces to increase contact with ambient air. The increased contact with the ambient air further facilitates heat transfer.
The lid also serves to promote even transfer of forces to the package. Even transfer of force to the package prevents force concentrations on the silicon layer, substrate or in some circumstances the printed circuit board. Even force transfer also reduces failures of the package.
To facilitate surface contact between the thermal lid and the silicon surface a thermal interface material (sometimes referred to as a “die interface material”) is employed. The die interface material can be applied to the surface of the silicon before the thermal lid is attached. The die interface material is not necessarily a solid and can conform to imperfections in the surface of the silicon. Similarly, the die interface material can conform to imperfections in the surface of the thermal lid. Thus, using a die interface material increases the surface contact between the silicon and the thermal lid and promotes heat transfer.
An example of a material that is suitable for a thermal interface material is manufactured by Thermagon of Cleveland, Ohio. This specific material, referred to as T-lma-60, has suitable thermal conductive properties and can be used as a thermal interface material. T-lma-60 can have more than one layer and is a thermal conductive structure phase change material. T-lma-60 changes phase from solid to liquid at approximately 60° C. A thermal interface material, such as T-lma-60 or other, can have a plurality of layers. For example, a thermal interface material such as T-lma-60 can have three layers, one of which can be a metallic central layer.
The increased surface contact between the silicon surface and lid has an additional benefit. When the lid is applied to the silicon layer a force is transferred. If the force is not uniformly transferred, failures of the silicon can result. Failures of the silicon surface can result in rejected packages or later failures.
When a heat sink is employed it is also known to utilize a heat sink interface material. Similar in material characteristic to a die interface material, a heat sink interface material is not necessarily a solid. Similar in function to a die interface material, a heat sink interface material also improves heat transfer properties by improving surface contact between the heat sink and the lid. Similar to the die interface material the heat sink interface material improves force transfer by increasing surface contact between the heat sink and the lid.
FIG. 1A
depicts substrate
120
adjacent to printed circuit board (sometimes referred to as “pcb”)
110
. Silicon die
130
is bonded to substrate
120
as previously discussed. Die interface material
150
is a non-solid used to facilitate heat transfer between silicon die
130
and lid
140
. Lid
140
contacts heat sink interface material
160
as shown. Heat sink interface material
160
contacts heat sink
170
as shown. Lid interface material
180
is used to facilitate heat transfer between silicon die
130
and substrate
120
.
FIG. 1B
depicts a thermal lid with a cavity depth of zero. As depicted in
FIG. 1B
, lid interface material
180
is not typically used for applications having a zero cavity thermal lid due to the lack of surface contact between thermal lid
140
and substrate
120
.
FIG. 1C
also depicts the related art of facilitating heat transfer from a silicon die. As shown in
FIG. 1C
, die interface material
150
is again employed. However, in the application as depicted in
FIG. 1C
neither a thermal lid nor a heat sink interface material are employed (as shown previously in FIG.
1
B). Still referring to
FIG. 1C
, die interface material
150
is employed to improve the surface contact between silicon die
130
and heat sink
170
. In the application shown in
FIG. 1C
the heat sink
170
directly contacts die interface material
150
.
FIG. 2A
depicts the logical steps of placing die interface material
150
on silicon die
130
. As shown in
FIG. 2A
, the method begins with start
210
. From start
210
the logical steps include providing substrate, providing silicon die
220
and providing thermal lid
240
. After providing silicon die
220
and providing substrate
230
the silicon die
130
and substrate
120
are bonded,
250
. Provide thermal lid
240
is shown occurring prior to bonding (
250
) silicon die
130
to substrate
120
but can occur later. After providing thermal lid
240
die interface material
150
is placed (
260
) on silicon die
130
. After die interface material
150
is place (
260
) on silicon die
130
thermal lid
140
is placed (
270
) on die interface material
150
. In one method, after the thermal lid and organic thermal interface material are placed on the silicon layer
270
, the proce

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