Data processor with an execution unit for performing load instru

Details Data processor with an execution unit for performing load instru Data processor with an execution unit for performing load instru

1996-03-27

1997-09-02

Donaghue, Larry D.

395569, 395391, 395393, 39580041, G06F 938

Patent

active

056642156

ABSTRACT:
The disclosed data processor (10) dispatches load/store multiple and load/store string instructions to a load/store unit (28) as a sequence of simple load or store instructions. The sequencer unit (18) assigns an entry of a rename buffer (34) to which the load/store unit writes back the data of each simple load instruction. This strategy facilitates early data forwarding for subsequent instructions. Conversely, the sequencer unit supplies a rename buffer tag to the load/store unit if it is not able to supply the operands of a simple store instruction.

REFERENCES:
patent: 5291586 (1994-03-01), Jen et al.
patent: 5416911 (1995-05-01), Dinkjian et al.
Bandyopadhoya et al; "Micro-Code Based RISC Architecture"; IEEE, 1987.
Gary et al; "Power PC 603; A Microprocessor for Portable Computers": IEEE, Winter 94.

Affiliated with

Also associated with

Rating

Data processor with an execution unit for performing load instru does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Data processor with an execution unit for performing load instru, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Data processor with an execution unit for performing load instru will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-317384