Structure having embedded flush circuitry features and...

Etching a substrate: processes – Forming or treating electrical conductor article

Reexamination Certificate

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Details

C216S014000, C216S075000, C216S052000, C029S847000

Reexamination Certificate

active

06663786

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to providing a structure having circuitry features and in particular to embedded flush circuitry features. The present invention is especially advantageous for fabricating buried interconnection levels that are in close proximity to one another in a printed circuit board structure.
BACKGROUND OF THE INVENTION
Printed circuit boards find a wide variety of uses in the electronics industry with the demand for high performance, printed wiring, or circuit boards for various applications steadily increasing. For instance, the complexity, compactness and electrical performance requirements of printed boards have significantly increased over the last several years.
The demands on printed circuit boards require high density packaging, fine interconnection, multilayer formation and the need to form a plurality of interconnections in a small space.
Currently, printed circuit board interconnection levels are built on top of a dielectric thin film layer. Circuitry features are formed using photolithographic and subtractive etch techniques. In a typical method, a metallic foil and especially copper foil is laminated to the substrate followed by using photolithographic and subtractive etching to create the circuitry. The copper foil includes a roughened or dendritic backside surface for inducing mechanical adhesion to the substrate. Smooth copper layers do not adequately bond without an auxiliary bonding agent. Great difficulties exist in adequately etching dendrites especially when dealing with small spaces. Moreover, along with the concern created by dendrites, the width of the lines (e.g. about 0.5 mils wide), and photolithographic issues (e.g. resolution of fine features, 0.7 mil wire with
1
.
1
mil space, in a thin photo resist film), and subtractive etch undercut/pad rounding, render clearly and fully resolving small line spaces such as the 1.8 mil pitch features presently desired very difficult. Additionally, this subtractive etch approach results in unprotected circuitry features referred to as “skyscrapers” that extend above an underlying plane of dielectric barrier material.
In many structures, it is important to plate another metal such as gold or nickel gold onto the copper circuitry. The “skyscraper” structure causes a problem of bridging or shorting between lines especially where there exist closely spaced features.
SUMMARY OF THE INVENTION
The present invention provides for obtaining a structure having dense embedded flush circuitry features. The present invention makes it possible to create circuitry features that are much more densely configured than those fabricated using current methods. This is made possible since the final structure is a circuitry feature having dielectric regions and conductive features that are coplanar.
In particular, the present invention relates to a structure comprising a substrate having a surface; a polymeric dielectric applied to said surface of said substrate; conductive circuitry features embedded in said polymeric dielectric, wherein said conductive circuitry features are substantially flush with and surrounded by said polymeric dielectric.
The present invention also relates to a method for fabricating a structure having embedded flush circuitry features. The method comprises:
providing a sacrificial carrier film having a front side and a back side;
depositing a conductive seed layer on said front side of said sacrificial carrier film;
plating a layer of conductive metal onto said seed layer;
personalizing circuitry features on said layer of conductive metal;
embedding said front side of said sacrificial carrier film having the circuitry features into a dielectric material; and
removing said sacrificial carrier film.
The present invention also relates to a structure obtained by the above process. Still other objects and advantages of the present invention will become readily apparent by those skilled in the art from the following detailed description, wherein it is shown and the preferred embodiments of the invention are described, simply by way of illustration of the best mode contemplated of carrying out the invention. As will be realized the invention is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, without departing from the invention. Accordingly, the description is to be regarded as illustrative in nature and not as restrictive.


REFERENCES:
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patent: 5664325 (1997-09-01), Fukutomi et al.
patent: 5821168 (1998-10-01), Jain
patent: 5822850 (1998-10-01), Odaira et al.
patent: 5822856 (1998-10-01), Bhatt et al.
patent: 5976393 (1999-11-01), Abe
patent: 5977642 (1999-11-01), Appelt et al.
patent: 6130161 (2000-10-01), Ashley et al.
patent: 6270889 (2001-08-01), Kataoka et al.

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