Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction
Reexamination Certificate
2000-11-06
2003-02-25
Crane, Sara (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Thin active physical layer which is
Heterojunction
C257S077000, C257S190000, C257S094000, C257S096000, C257S103000
Reexamination Certificate
active
06525335
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates generally to light emitting semiconductor devices and more particularly to light emitting semiconductor devices including carrier confinement layers.
2. Description of the Related Art
A conventional Al
x
Ga
y
In
z
P light emitting diode (LED)
1
, as shown in
FIG. 1
, includes an n-doped semiconductor substrate
2
, an n-doped confinement layer
4
, an active region
6
, a p-doped confinement layer
8
, an optional electrically conductive window layer
10
, n-contact
12
electrically coupled to substrate
2
, and p-contact
14
electrically coupled to p-doped confinement layer
8
. In the notation Al
x
Ga
y
In
z
P, 0≦x≦1, 0≦y≦1, 0≦z≦1, and x+y+z=1. Application of a suitable forward bias across contacts
12
and
14
results in injection of electrons into active region
6
from n-doped confinement layer
4
, and injection of holes into active region
6
from p-doped confinement layer
8
. Radiative recombination of electrons and holes in active region
12
generates light.
As used herein, the terms “p-type confinement layer” and “electron confinement layer” refer to a semiconductor layer which at least partially confines electrons to an active region in a semiconductor heterostructure. Similarly, the terms “n-type confinement layer” and “hole confinement layer” refer herein to a semiconductor layer which at least partially confines holes to an active region in a semiconductor heterostructure.
FIG. 2
shows a conventionally calculated band structure diagram for the heterostructure defined by active region
6
and confinement layers
4
and
8
of the conventional Al
x
Ga
y
In
z
P LED
1
shown in FIG.
1
. The horizontal axis of
FIG. 2
represents position in LED
1
measured perpendicular to active region
6
and confinement layers
4
and
8
, with the location of zero distance arbitrarily chosen. In the example of
FIG. 2
, n-type confinement layer
4
is formed from n-type AlInP, p-type confinement layer
8
is formed from p-type AlInP, and active region
6
is formed from (Al
0.3
Ga
0.7
)
0.5
In
0.5
P. The interfaces between confinement layer
4
and active region
6
and between active region
6
and confinement layer
8
are indicated by dashed lines
16
and
18
, respectively. The vertical axis of
FIG. 2
represents the energy of the conduction band edge
20
and of the valence band edge
22
when confinement layers
4
and
8
and active region
6
are forward biased at about 2.1 volts. The location of zero energy on the vertical axis is arbitrarily chosen.
The energies of both the conduction band edge
20
and the valence band edge
22
vary with position in the LED. In particular, the energy of conduction band edge
20
is higher in p-type confinement layer
8
than in active region
6
, resulting in a potential energy barrier (electron barrier
24
) in conduction band edge
20
at interface
18
. Since only a fraction of the electrons injected into active region
6
can overcome electron barrier
24
and diffuse into p-type confinement layer
8
, the injected electrons are partially confined to active region
6
by electron barrier
24
. Consequently, the concentration of electrons in active region
6
is increased by the presence of p-type confinement layer
8
, which is also referred to as an electron confinement layer. Similarly, the energy of valence band edge
22
is higher in active region
6
than in n-type confinement layer
4
, resulting in a potential energy barrier (hole barrier
26
) at interface
16
which partially confines injected holes to active region
6
.
Confinement of electrons and holes to active region
6
increases their concentration in active region
6
and thus the rate at which they radiatively recombine. Also, electrons and holes which escape from active region
6
typically recombine nonradiatively in confinement layers
4
and
8
. Thus, the internal quantum efficiency of the LED depends strongly on the degree to which electrons and holes are confined to active region
6
.
In a conventional Al
x
Ga
y
In
z
P LED, n-type confinement layer
4
, active region
6
, and p-type confinement layer
8
are grown by, for example, metal-organic chemical vapor deposition (MOCVD). The choice of materials from which confinement layers
4
and
8
may be grown is limited by the requirement that these layers must be grown lattice matched to active region
6
to provide confinement layers with low dislocation densities. In addition, confinement layers
4
and
8
must be grown at temperatures that will not degrade underlying layers. The best electron confinement layers that can be grown lattice matched to an Al
x
Ga
y
In
z
P active region
6
are (Al
x
Ga
1−x
)
0.5
In
0.5
P layers with x ranging from about 0.7 to about 1.
Unfortunately, electron leakage from active region
6
into p-type confinement layer
8
can severely limit the internal quantum efficiency of a conventional Al
x
Ga
y
In
z
P LED. Such electron leakage occurs due to the relatively small offset between the conduction band in the Al
x
Ga
y
In
z
P system active region and the conduction band in, for example, a p-(Al
x
Ga
1−x
)
0.5
In
0.5
P electron confinement layer (x about 0.7 to about 1). In conventional LED
1
of
FIG. 1
, for example, the relatively small offset between the conduction band in the (Al
0.3
Ga
0.7
)
0.5
In
0.5
P active region
6
and the conduction band in the p-AlInP electron confinement layer
8
results in a correspondingly small electron barrier
24
of about 0.2 electron volts (eV) over which electrons escape by thermionic emission. Moreover, as the mole fraction of aluminum in active region
6
is increased to provide shorter wavelength emission, electron barrier
24
decreases and electron leakage correspondingly increases. Consequently, the internal quantum efficiency of a conventional Al
x
Ga
y
In
z
P LED is undesirably low, particularly at short emission wavelengths and especially at temperatures greater than about 25° C.
Similarly, leakage of holes from active region
6
over hole barrier
26
into n-type confinement layer
4
can degrade the performance of a conventional Al
x
Ga
y
In
z
P LED, particularly if it has a thin active region
6
or if it is operated at a high injection current.
What is needed is a light emitting semiconductor device exhibiting enhanced carrier confinement.
SUMMARY
A method of forming a light emitting semiconductor device includes fabricating a stack of layers comprising an active region, and wafer bonding a structure including a carrier confinement semiconductor layer to the stack. In one embodiment, the carrier confinement layer is wafer bonded to the active region. In other embodiments, at least one spacer layer is disposed between the carrier confinement layer and the active region.
According to one aspect of the present invention, a light emitting semiconductor device includes a first carrier confinement layer of a first semiconductor having a first conductivity type, an active region, and a wafer bonded interface disposed between the active region and the first carrier confinement layer. The light emitting semiconductor device may further include a second carrier confinement layer of a second semiconductor having a second conductivity type, with the active region disposed between the first carrier confinement layer and the second carrier confinement layer. The active region may be formed from materials including but not limited to (Al
x
Ga
1−x
)
0.5
In
0.5
P and other Al
x
Ga
y
In
z
P.
In one implementation, the wafer bonded interface is an interface of the active region and the first carrier confinement layer. In other implementations, at least one spacer layer is disposed between the first carrier confinement layer and the active region, and the wafer bonded interface is an interface of a spacer layer and the first carrier confinement layer, an interface of a spacer layer and the active region, or an interface of two spacer layers. The first carrier confinement layer may include a p-type or
Kocot Christopher P.
Krames Michael R.
Crane Sara
Lumileds Lighting U.S. LLC
Patent Law Group LLP
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