Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2001-08-23
2003-11-25
Chow, Dennis-Doon (Department: 2675)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S066000, C345S068000
Reexamination Certificate
active
06653994
ABSTRACT:
This application is based on application No. 2000-253724 filed in Japan, the content of which is hereby incorporated by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a plasma display panel display device, and a drive method for use in a plasma display panel display device.
2. Related Art
In recent years, there have been high expectations for large-screen display devices with superior picture quality such as high-definition displays. Hence research is being performed into a variety of display devices, such as CRTs (cathode ray tubes), LCDs (liquid crystal displays), and PDPs (plasma display panels).
Among these display devices, PDPs are best suited for large-screen use, with sixty-inch models already having been developed.
Especially, surface discharge AC (alternating current) PDPs, which are suitable for large-screen use, are prevalent at present.
A surface discharge AC PDP has the following construction. A front panel and a backpanel are opposed to each other with barrier ribs interposed therebetween. A discharge gas is enclosed in a discharge space which is partitioned by the barrier ribs.
Typically, scan electrodes and sustain electrodes are arranged in the form of stripes on a main surface of the front panel. A dielectric layer made of glass is formed on the front panel so as to cover the scan and sustain electrodes, and a protective layer is formed on the dielectric layer.
On the other hand, data electrodes are arranged in the form of stripes on a main surface of the back panel which faces the front panel. A dielectric layer made of glass is formed on the back panel so as to cover the data electrodes, and the barrier ribs are formed on the dielectric layer in parallel with the data electrodes. Phosphor layers of red, green, and blue are applied in turn to channels that are formed by the barrier ribs and the dielectric layer.
To drive this surface discharge AC PDP, drive circuits are used to apply pulses between electrodes based on input image data, to cause a write discharge for writing the image data and a sustain discharge for sustaining a discharge. The sustain discharge causes emission of ultraviolet light from the discharge gas. This ultraviolet light is absorbed by the particles of red, green, and blue phosphors in the phosphor layers, which results in excited emission of light.
Discharge cells in such a surface discharge AC PDP are fundamentally only capable of two display states, ON and OFF. Accordingly, a field timesharing gradation display method is typically adopted whereby one field for each color is divided into multiple sub-fields each having a predetermined light emission period and a gray scale is expressed by the combination of the sub-fields. For image display in each sub-field, an ADS (address display-period separation) method is employed whereby a series of operations of writing data in a write period and sustaining a discharge in a sustain period are carried out. In this drive method, a set-up period for applying set-up pulses is usually provided at the beginning of each field or each sub-field, so as to stabilize the write operation.
As a set-up pulse, a pulse of a typical rectangular waveformor a pulse of a ramp waveform, which is disclosed in U.S. Pat. No. 5,745,086 (Weber), is used. The ramp waveform is described in detail by Larry F. Weber “Plasma Display Device Challenges” in ASIA DISPLAY 98, pp.23-27.
A pulse that combines ramp waveforms with sharp voltage rise and drop portions, which is disclosed in PCT International Publication No. WO 00/30065 (Hibino), is also used as a set-up pulse.
A set-up period that uses this waveform combination is described in detail below, by referring to FIG.
6
.
As shown in the drawing, a drive circuit maintains a data electrode group D and a sustain electrode group SUS at 0(V), during the first part of the set-up period. Meanwhile, after a sharp rise from 0(V) to Vp(V) (a voltage which does not cause a discharge with the sustain electrode group SUS or the data electrode group D), a voltage of a ramp waveform (hereafter “ramp voltage”) that gradually rises to Vr(V) (a voltage which causes a discharge with the sustain electrode group SUS) is applied to a scan electrode group SCN. While the ramp voltage is being applied, a first weak set-up discharge occurs between the scan and data electrode groups and between the scan and sustain electrode groups, in each discharge cell. As a result, negative wall charges are accumulated on the part of the protective layer that covers the scan electrode group SCN, whereas positive wall charges are accumulated on the part of the dielectric layer which covers the data electrode group D and on the part of the protective layer which covers the sustain electrode group SUS.
After this, the drive circuit sharply decreases the voltage applied to the scan electrode group SCN, from Vr(V) to Vq(V) (a voltage that does not cause a discharge with the sustain electrode group SUS or the data electrode group D).
In the second part of the set-up period, while holding the scan electrode group SCN at Vq(V), the drive circuit sharply increases the voltage applied to the sustain electrode group SUS from 0(V) to Vh(V) (a positive voltage which does not cause a discharge with the scan electrode group SCN or the data electrode group D). The sustain electrode group SUS is held at Vh(V) afterwards.
With the sustain electrode group SUS being held at Vh(V), the drive circuit decreases the voltage applied to the scan electrode group SCN from Vq(V) to Vb(V) (a voltage which causes a discharge with the sustain electrode group SUS), in the form of a ramp. When the voltage applied to the scan electrode group SCN is dropping to Vb(V) while the voltage applied to the sustain electrode group SUS is kept at Vh (V), a second weak set-up discharge occurs between the sustain and scan electrode groups in each discharge cell.
As a result, the negative wall charges accumulated on the protective layer over the scan electrode group SCN and the positive wall charges accumulated on the protective layer over the sustain electrode group SUS are weakened, whereas the positive wall charges accumulated on the dielectric layer over the data electrode group D remain as they are.
In the set-up pulse shown in
FIG. 6
, the ramp waveforms facilitate accumulation of wall charges, whereas the sharp voltage rise and drop portions serve to shorten the set-up period. Thus, by using such a set-up pulse that combines ramp waveforms with sharp voltage rise and drop portions, a set-up can be carried out where sufficient wall charges are accumulated without prolonging the set-up period.
Also, the rise of the voltage applied to the sustain electrode group SUS from 0(V) to Vh(V) enhances the effect of shortening the set-up period.
At the end of each field, an erase period is provided for erasing accumulated wall charges. Here, the wall charges are sometimes not able to be sufficiently erased in the erase period, depending on illumination conditions. This being so, if the above set-up pulse that has the steep voltage drop portion (with a rate of change of 2V/&mgr;sec or more) is used, a first undesired discharge (hereinafter “discharge error”) occurs at E
1
in
FIG. 6
, in the cells where the wall charges were not sufficiently erased in the erase period. In these cells where the discharge error occurs at E
1
, second and third discharge errors are likely to follow at E
2
and E
3
.
Especially, the discharge error at E
3
has the same effect as the write discharge in the write period following the set-up period, thereby causing a discharge error in the sustain period (i.e. the occurrence of sustain discharge in the cells to which data should not be written).
Though such a discharge error in the sustain period does not occur in each field but rather takes place once every several tens fields per cell, still it is easily noticeable to the human eye unlike other discharges occurring in the set-up period or the like. As a result, the image quality will end up deteriorating.
Thus, in the conventional
Masuda Shinji
Takeda Minoru
Chow Dennis-Doon
Matsushita Electric - Industrial Co., Ltd.
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