Method for fabricating semiconductor memory device

Details Method for fabricating semiconductor memory device Method for fabricating semiconductor memory device

2001-06-28

2003-02-25

Nelms, David (Department: 2818)

Semiconductor device manufacturing: process

Having magnetic or ferroelectric component

C438S238000, C438S386000, C438S387000, C438S396000, C257S068000, C257S071000, C257S295000, C257S296000

Reexamination Certificate

active

06524868

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a semiconductor memory device and, more particularly, to a method for fabricating a semiconductor memory device, in which a lifting phenomenon is prevented by improving an adhesive strength between an upper electrode and an interlayer insulating layer.
DESCRIPTION OF THE PRIOR ART
With the recent progress in film deposition techniques, applications of a nonvolatile memory cell using a ferroelectric thin film have increasingly been developed. This nonvolatile memory cell is a high-speed rewritable nonvolatile memory cell utilizing the high-speed polarization/inversion and the residual polarization of the ferroelectric capacitor thin film.
Therefore, a ferroelectric random access memory (FeRAM) where a capacitor thin film with ferroelectric properties such as strontium bismuth tantalate (SBT) and lead zirconate titanate (PZT) is increasingly used for a capacitor, because it assures a low-voltage and high-speed performance, and does not require periodic refresh to prevent loss of information during standby intervals like a dynamic random access memory (DRAM).
Since a ferroelectric material has a dielectric constant ranging from a value of hundreds to thousands and a stabilized residual polarization property at room temperature, it is being applied to the non-volatile memory device as the capacitor thin film. When employing the ferroelectric capacitor thin film in the non-volatile memory device, information data are stored by polarization of dipoles when electric field is applied thereto. Even if the electric field is removed, the residual polarization still remains so that the information data, i.e., “0” or “1”, can be stored.
In fabricating a ferroelectric capacitor, a high-temperature thermal treatment is carried out so that a lower/upper electrode is formed using Pt, Ir, Ru, their oxides or a combination thereof. However, since these materials have poor adhesive characteristics, a lifting phenomenon occurs during a following thermal treatment. The lifting phenomenon can be prevented by forming an adhesion layer between a lower electrode and an interlayer insulating layer.
Meanwhile, there is no adhesion layer between an upper electrode and an interlayer insulating layer covering the upper electrode. As a result, during a cleaning process after a formation of a contact hole exposing the upper electrode, a cleaning solution soaks into a boundary between the upper electrode and the interlayer insulating layer, so that a lifting phenomenon results.
SUMMARY OF THE INVENTION
It is, therefore, an object of the present invention to provide a method for fabricating a semiconductor memory device, in which the occurrence of a lifting phenomenon is prevented by improving an adhesive strength between an upper electrode and an interlayer insulating layer.
In accordance with an aspect of the present invention, there is provided a semiconductor memory device, comprising a capacitor formed on a semiconductor substrate, wherein the capacitor includes a lower electrode, a dielectric layer and an upper electrode; an adhesion layer formed on the upper electrode; an interlayer insulating layer covering the capacitor, wherein a portion of the interlayer insulating layer is in contact with the adhesion layer; a contact hole, formed within the interlayer insulating layer, whose bottom exposes the upper electrode and whose sidewalls expose the interlayer insulating layer and the adhesion layer; and an interconnection line coupled to the capacitor via the contact hole.


REFERENCES:
patent: 5418388 (1995-05-01), Okudaira et al.
patent: 6210979 (2001-04-01), Kweon et al.
patent: 6225156 (2001-05-01), Cuchiaro et al.
patent: 6239462 (2001-05-01), Nakao et al.
patent: 0008955 (1997-07-01), None

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