Interface module for operation between a chip card and a...

Registers – Records – Conductive

Reexamination Certificate

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Details

C235S380000

Reexamination Certificate

active

06520416

ABSTRACT:

FIELD OF INVENTION
The invention relates to a means for the operation of a chip card and the data exchange between a chip card and a microprocessor-based system, e.g. a personal computer. The term microprocessor-based covers any system which includes a microprocessor, for example, a system with a microcontroller or a personal computer.
BACKGROUND OF THE INVENTION
Over the previous years, chip cards have already been employed on a large scale as bank and credit cards, identification and access authorisation cards in the mobile radio area (GMS cards: global system of mobile communication), health insurance cards, telephone cards, as well as cards for many other applications.
For communication with so-called card writing/reading devices, chip cards are provided with metallic contact surfaces on the card body, which are connected with the chip (microprocessor chip or memory chip with logic unit) in the card. The card writing/reading device itself comprises a contact-making unit with contacts which correspond to the contact surfaces of the chip card, where the contacts and the contact surfaces are brought into an electrically conductive connection after the insertion of the card into the card writing/reading device. One contact surface is intended for the supply voltage (VCC), one for the reference voltage/ground (GND), one for the clock frequency (CLK), one for the serial data exchange (I/O), and one for the reset line (RST).
For standardisation reasons the chip dimensions, the position of the contact surfaces as well as the electrical signals from and to the chip card, including the data transmission, are standardized (ISO 7810, 7816-2, 7816-3).
In addition to the above mentioned five contact surfaces, the standards also provide for a contact surface for the supply of a programming voltage which, however, is no longer required for the majority of chip cards because these generate the programming voltage themselves internally in the chip from the supply voltage. In addition, two contact surfaces are provided by the standards for future applications.
The data exchange between chip card and card writing/reading device is effected in a synchronous manner in the case of memory cards, while it is effected in an asynchronous manner in the case of microprocessor cards. Two protocols (T=0 and T=1) are standardized for the asynchronous data transmission, with one (T=0) being byte-oriented and the other (T=1) being block-oriented.
From U.S. Pat. No. 4,767,920 a card writing/reading device for chip cards is known via which the communication between a computer or, in general, between a microprocessor-based system and a chip card is made possible. In addition to the contact-making unit for the control and supply of the chip card and for the data exchange with the chip card, the card writing/reading device comprises several discrete components. These are, among others:
a microprocessor for receiving and forwarding the serially sent data from the chip card to a microprocessor-based system or for receiving and forwarding the data sent by the microprocessor-based system to the chip card, respectively, with the communication protocol to be used in each case being stored as a control program in the microprocessor of the card writing/reading unit;
a circuit for the generation of the supply voltage (VCC) for the chip card;
a circuit for the generation of the clock signal for the chip card from the clock pulse of a piezoelectric crystal oscillator.
It is disadvantageous here that the speed of the communication is relatively slow between the microprocessor-based system and the chip card with a card writing/reading device, including a microprocessor, connected between the microprocessor system and the chip card because a program which is stored in the microprocessor of the card writing/reading device must be executed under serial execution of the individual command steps for the data transfer from and to the chip card for the conversion of the corresponding communication protocol (e.g. T=0). In addition, the integration of such a card writing/reading device which includes a microprocessor into a microprocessor-based system is very time consuming and costly because it is mandatory that the persons who have to carry out the integration have a precise knowledge of the type of microprocessor in the card writing/reading device and the way of control and communication with this type of microprocessor. This is further complicated in particular by the fact that the manufacturers and providers of microprocessor-based systems and the manufacturers and providers of card writing/reading devices are not identical. Furthermore, the types of microprocessors employed in the microprocessor-based system and in the card writing/reading device are generally not identical. An example for this would be a company which offers an attendance recording system on a personal computer and plans to include employee identification cards in the form of chip cards for attendance recording and, for this reason, has to integrate a corresponding card writing/reading device (interface) into its system which is not to be developed by said company.
BRIEF SUMMARY OF THE INVENTION
According to an embodiment of the invention, an interface module is provided for the operation of a chip card and data exchange between a microprocessor-based system, where the chip card includes electrical contact surfaces for a supply voltage, a clock signal, a reference voltage/ground, a serial data input/output, and a reset connection. The contact surfaces correspond to contacts of a contact-making unit, and the contacts are connected with the interface module. Advantageously, the chip card may be driven by the microprocessor-based system immediately via the interface unit without the interconnection of another microprocessor.
The interface module according to this embodiment includes a first circuit for communicating with the microprocessor-based system, a second circuit for communicating with the chip card in accordance with data and control instructions received from the microprocessor-based system, a third circuit for generating and/or controlling the supply voltage for the chip card, and a fourth circuit for generating a clock signal which is modified with respect to a clock frequency for the chip card from the clock pulse of an external clock.
The interface module may be formed as a monolithic semiconductor module. The first circuit may comprise a parallel interface for communicating with the microprocessor-based system. The parallel interface may comprise a buffer memory area using the first-in/first-out (FIFO) principle, for the temporary storage of data and control instructions. The parallel interface may support at least parallel interface modes ECP bus and &mgr;P bus, where the microprocessor-based system indicates the desired mode of the interface module via a selection signal, and where the interface module is automatically configured for supporting the selected mode upon the microprocessor-based system indicating the selected mode.
The interface module may alternatively comprise a serial interface for communicating with the microprocessor-based system. The interface module may include a fifth circuit for evaluating a Card In signal which indicates whether a chip card is properly positioned in the contact-making unit, and where predetermined switching sequences are executed automatically in the interface module dependent on the Card In signal, and where the switching sequences define further communication with the chip card and the switching condition of the respective contacts of the contact-making unit. The switching sequence may be initiated in the interface module via a corresponding control instruction of the microprocessor-based system which defines which supply voltage is generated for the chip card.
The third circuit of the interface module may be adapted for generating at least two different high supply voltages. The interface module may comprise a UART module for the parallel/serial conversion of data exch

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