Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2001-03-28
2003-11-25
Hjerpe, Richard (Department: 2674)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S077000, C345S082000, C345S083000, C345S092000, C345S204000, C345S211000, C345S212000, C345S213000, C345S214000, C315S169300, C713S330000
Reexamination Certificate
active
06653996
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a display device comprising a thin film transistor (hereinafter referred to as a “TFT”) for controlling a current to be supplied to a light emissive element.
2. Description of the Related Arts
In recent years, electroluminescence (hereinafter referred to as “EL”) display devices using an EL element have been attracting attention as possible replacements for CRTs and LCDs.
In addition, an EL display device provided with a thin film transistor functioning as a switching element for driving the EL element has been researched and developed.
FIG. 1
is an equivalent circuit diagram of an EL display device according to a related art.
Referring to
FIG. 1
, an EL display panel includes, on an insulating substrate
10
, a plurality of scan signal lines
81
connected to a vertical driver
80
for supplying a scan signal, and a plurality of data lines
91
receiving a data signal Sig on a data input line
92
when sampling transistors SP
1
, . . . , SPk, SPk+
1
, . . . , SPn are turned on in accordance with the timing of a sampling pulse output from a horizontal driver
90
for supplying the data signal. Near each intersection between these lines
81
and
91
, a switching TFT
30
connected to these lines
81
and
91
, an element driving TFT
40
connected to the switching TFT
30
, and an organic EL element
60
for emitting light by receiving a current from an element driving power source line
100
in accordance with a voltage applied to a gate of the element driving TFT
40
are disposed.
A storage capacitor
70
is provided between the TFTs
30
and
40
, having one electrode
71
connected to a source
11
s
of the TFT
30
, and the other electrode
72
receiving a potential common to all display pixels
200
.
The horizontal driver
90
receives a timing signal and the like, such as a horizontal start pulse STH, while the vertical driver
80
receives a timing signal and the like, such as a vertical start pulse.
The drivers
80
and
90
also receive driving voltages Vvdd and Hvdd, respectively, for driving these drivers. Each of the driving voltages Hvdd and Vvdd drives a shift register forming one of the drivers.
The sampling pulses are sequentially output from the horizontal driver
90
based on the start signal, and the sampling transistors SP are turned on in response to the sampling pulse, whereby a data signal Vdata
1
on the data input line
92
is supplied to the data signal line
91
. A gate signal is applied from the gate signal line
81
to a gate
13
of the first TFT
30
, thereby turning on the first TFT
30
. As a result, a drain signal is supplied to a source
11
s
of the TFT
30
, and a voltage Vdata
2
obtained at this point in time is applied to a gate
43
of the second TFT
40
, thereby turning on the second TFT
40
and causing a current to flow from the element driving power source line
100
to the EL element
60
in accordance with a gate voltage Vdata
2
, such that light is emitted from the EL element
60
.
A power source circuit
300
for generating the driving voltages Vvdd and Hvdd for driving the drivers
80
and
90
, and an element driving power source Pvdd shown in
FIG. 1
will next be described.
FIG. 2
is a block diagram of the power source circuit according to a related art.
Referring to
FIG. 2
, the power source circuit
300
includes a driver driving voltage generation circuit
320
for generating the driving voltages Hvdd and Vvdd for driving the drivers
80
and
90
, and an element driving voltage generation circuit
330
for generating the element driving voltage Pvdd. The driving voltage generation circuits
320
and
330
are each formed by a DC/DC converter for converting a voltage of a power source
310
, say, converting a voltage of 15V to a voltage of 12V.
The voltages of the driving voltage generation circuits
320
and
330
are provided to the drivers
80
and
90
and the element driving power source line
100
.
In conventional EL display devices, however, when the display device is turned off after use, within the power source circuit
300
, the flow of power is only suspended to the power source
310
and the circuits
320
and
330
. When the voltage Vdata
2
applied to the gate of the second TFT
40
falls before the element driving voltage Pvdd, a large amount of current may instantly flow to the EL element
60
from the power source line
100
, even though control by the second TFT
40
is not possible. When this occurs, degradation of an emissive layer
66
of the organic EL element
60
may result.
SUMMARY OF THE INVENTION
The present invention has been conceived in view of the above-described problems, and an object thereof is to provide a display device capable of preventing degradation of an emissive layer as would otherwise be caused by excessive and instantaneous emission of light from an EL element when the display device is turned off.
According to one aspect of the present invention, a display device includes a vertical driver for supplying a scan signal to a plurality of gate signal lines; a horizontal driver for supplying a data signal to a plurality of data signal lines crossing said plurality of gate signal lines; a switching element connected to the gate signal line and the data signal line at an intersection between these signal lines; an emissive element connected to said switching element; an element driving power source line for supplying electric power to said emissive element; and a sequence circuit for stopping supply of electric power to said element driving power source line before stopping supply of a driver driving power source.
According to another aspect of the present invention, the switching element is composed of first and second thin film transistors, the first thin film transistor has a first region of an active layer connected to said data signal line, a gate connected to said scan signal line, and a second region of the active layer connected to a gate of the second thin film transistor, and the second thin film transistor has a first region of an active layer connected to said element driving power source line, and a second region of the active layer connected to one electrode of said emissive element.
According to a further aspect of the present invention, the sequence circuit includes first and second transistors; first and second resistors; and a third resistor connecting said first and second transistors, said first transistor has an emitter connected to said first resistor which is connected to an element driving power source generation circuit, a base connected to a power source, and a collector connected to ground, and said second transistor has an emitter connected to said second resistor which is connected to a driver driving power source generation circuit, a base connected to said third resistor, which is connected to the emitter of said first transistor, and to the other electrode of a capacitor whose one electrode is connected to ground, and a collector connected to ground.
According to a further aspect of the present invention, the emissive element is an electroluminescence element.
With the present invention, a display device capable of preventing degradation of an emissive element which would otherwise be caused by a large amount of current instantly flowing to the emissive element when the display device is turned off can be provided.
REFERENCES:
patent: 4528480 (1985-07-01), Unagami et al.
patent: 5952789 (1999-09-01), Stewart et al.
patent: 6011529 (2000-01-01), Ikeda
patent: 6034659 (2000-03-01), Wald et al.
patent: 6307324 (2001-10-01), Hirano et al.
patent: 6356032 (2002-03-01), Suzuki et al.
patent: 6456013 (2002-09-01), Komiya et al.
Cantor & Colburn LLP
Hjerpe Richard
Sanyo Electric Co,. Ltd.
Zamani Ali
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