Semiconductor device manufacturing: process – Bonding of plural semiconductor substrates – Thinning of semiconductor substrate
Reexamination Certificate
2001-05-30
2003-02-25
Chaudhuri, Olik (Department: 2813)
Semiconductor device manufacturing: process
Bonding of plural semiconductor substrates
Thinning of semiconductor substrate
C438S618000, C438S780000, C438S926000
Reexamination Certificate
active
06524933
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device, and more specifically to a method of manufacturing a semiconductor device, wherein wirings or interconnections are formed on the surface of a semiconductor substrate with a predetermined circuit formed thereon and the back of the semiconductor substrate is thereafter processed.
2. Description of the Related Art
A method of manufacturing a semiconductor device with a conventional multilayer interconnection formed thereon will be explained based on FIG.
1
.
As shown in FIG.
1
(
a
), a lower interconnection or wiring
802
is formed on a,semiconductor substrate
800
with a predetermined circuit formed thereon, by a vapor deposition method or a plating method or the like, for example. Next, as shown in FIG.
1
(
b
), an insulating film
804
is formed on the lower wiring
802
and a contact hole
806
is thereafter defined in an area which contacts an upper interconnection or wiring, by a photolithography method and an etching method, for example. As shown in FIG.
1
(
c
), an upper wiring
808
is further formed on the insulating film
804
and within the contact hole
806
by the vapor deposition method or plating method or the like, for example and electrically connected to the lower wiring
802
.
Next, a protective film or coat
810
is formed over the upper wiring
808
as shown in FIG.
1
(
d
). Thereafter, the back of the semiconductor substrate
800
is polished or ground to set it to a desired assembly thickness, followed by deposition of a metal
812
, for example.
In recent years, there may be cases in which a multilayer interconnection having a so-called air bridge structure is used to reduce a parasitic capacitance developed with an increase in frequency as shown in FIG.
2
. In such an air bridge structure, a cavity
904
is defined without interposing an insulating film between a lower wiring
902
and an upper wiring
906
when a compound semiconductor substrate is used as a semiconductor substrate
900
.
SUMMARY OF THE INVENTION
However, the conventional structure has a problem in that since the surface of a semiconductor substrate must be held in a step for polishing and grinding the back or reverse side of the semiconductor substrate and a step for metal-depositing the back thereof, for example, an upper interconnection or wiring will deform due to an external force or break. A problem arises in that since cavitation is made between an upper wiring and a lower wiring in the case of a semiconductor device having the air bridge structure in particular, the strength of the semiconductor device against an external force is low and a manufacturing yield of the semiconductor device is reduced.
Accordingly, an object of the present invention is to provide a novel and improved method of manufacturing a semiconductor device, which is capable of reducing or preventing damage of a wiring formed over a semiconductor substrate.
In order to solve the above problems, the invention provides a method of manufacturing a semiconductor device, comprising a step for forming a wiring on the surface of a semiconductor substrate with a predetermined circuit formed thereon, a step for forming a resin layer having a substantially flat surface on the wiring, and a step for processing the back of the semiconductor substrate after the formation of the resin layer.
In the invention as noted above, since a substantially flat resin layer is formed on the surface of a semiconductor substrate, which has wiring irregularities, an external force applied to the surface of the semiconductor substrate in a step for processing the back of the semiconductor substrate can be dispersed over a wide range. As a result, for example, distortion and breaking of the (upper) wiring or interconnection can be reduced and a manufacturing yield is enhanced.
In order to solve the above problems, the invention also provides a method of manufacturing a semiconductor device, comprising a step for forming a wiring on the surface of a semiconductor substrate with a predetermined circuit formed thereon, a step for forming a resin wall higher than at least the wiring and substantially uniform in height on the periphery of the surface of the semiconductor substrate, and a step for processing the back of the semiconductor substrate after the formation of the resin wall.
In the invention as described above, an external force applied to the surface of a semiconductor substrate in a step for processing the back of the semiconductor substrate can be distributed to a resin wall formed on the periphery of the semiconductor substrate. As a result, for example, distortion and breaking of the (upper) wiring or interconnection can be reduced and a manufacturing yield is enhanced.
In order to solve the above problems, if the resin wall is configured so as to be formed along cutting lines of the semiconductor substrate, then no external force is applied to an (upper) wiring in a step for processing the back of the semiconductor substrate.
In order to solve the above problems, the invention further provides a method of manufacturing a semiconductor device, comprising a step for forming a lower wiring and an upper wiring which intersect each other, on the surface of a semiconductor substrate with a predetermined circuit formed thereon, a step for forming resin posts higher than the height of an intersecting portion of the lower and upper wirings and substantially uniform in height in the neighborhood of each individual intersecting portions of areas partitioned according to the intersection of the wirings after the formation of the lower and upper wirings, and a step for processing the back of the semiconductor substrate after the formation of the resin posts.
In the invention as described above, since an external force applied to the surface of a semiconductor substrate in a step for processing the back of the semiconductor substrate is distributed to resin posts, the external force applied to an upper wiring can be reduced. As a result, for example, distortion and breaking of the upper wiring can be reduced and a manufacturing yield is enhanced.
In order to solve the above problems, the resin wall may preferably be comprised of a polyimide resin.
In order to solve the above problems, the invention also provides a method of manufacturing a semiconductor device wherein a lower wiring and an upper wiring intersecting each other are formed on the surface of a semiconductor substrate with a predetermined circuit formed thereon, comprising forming protrusions each having the same structure as an intersecting portion of the lower and upper wirings in the neighborhood of each individual intersecting portions of areas partitioned by the wiring intersection portion thereof, according to a step identical to a step for forming the intersecting portion of the lower and upper wirings.
In the invention as described above, since columnar dummy patterns each obtained by laminating a metal and an insulating film are formed in the neighborhood of an intersecting portion of an upper wiring and a lower wiring, an external force applied to the surface of a semiconductor substrate in a step for processing the back of the semiconductor substrate can be distributed to the dummy patterns. As a result, distortion and breaking of the upper wiring used as an actual circuit can be reduced and a manufacturing yield is enhanced.
In the invention as described, for solving the above problems, the semiconductor device manufacturing method further has a step for pre-processing the semiconductor substrate so that an area for forming each protrusion becomes higher than other areas. If the protrusion is configured so as to be shaped in form higher than the wiring intersecting portion in height, then columnar dummy patterns each obtained by laminating a metal and an insulating film are formed in the neighborhood of an intersecting portion of an upper wiring and a lower wiring so as to become higher than the intersecting portion. Therefor
Chaudhuri Olik
Oki Electric Industry Co. Ltd.
Smoot Stephen W.
Volentine & Francos, PLLC
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