Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Responsive to electromagnetic radiation
Reexamination Certificate
2002-06-07
2003-06-03
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Making device or circuit responsive to nonelectrical signal
Responsive to electromagnetic radiation
C438S009000
Reexamination Certificate
active
06573120
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to solid state imaging devices equipped with charge coupled devices (CCD's) and, more particularly, the present invention relates to solid state imaging devices which are configured for electronic zooming and to methods of fabricating such devices.
Priority is claimed to Korean patent application No. 2000-27810, filed May 23, 2000, the contents of which are incorporated herein in their entirety.
2. Description of the Related Art
Generally, solid state imaging devices are semiconductor devices which sense external images and convert the thus sensed images into image signals. Images are typically captured through lenses and converted into image signals on a pixel by pixel basis. These image pixel signals are then amplified for visual reconstruction on a television or other display apparatus.
FIG. 1
illustrates the basic construction of a solid state imaging device. This diagram depicts a top view of the device, which is typically contained in a active area of a semiconductor substrate that is rectangular and defined by a surrounding field insulating region (not shown). Light receiving parts
10
are arranged in a matrix as shown and include respective photodiodess. Vertical transfer stages
20
extend parallel to each other in a column direction and are arranged between columns the light receiving parts
10
. The vertical transfer stages
20
are commonly coupled at one end to a horizontal transfer stage
30
that extends lengthwise in a direction perpendicular to the vertical transfer stages
20
.
The photodiodes of the light receiving parts
10
are each configured by a P-N junction formed in the semiconductor substrate. For example, a P-type impurity diode layer is formed over a surface layer of the semiconductor substrate, and a buried N-type impurity diode layer is formed thereunder. A periphery of the N-type impurity diode layer is surrounded by the P-type impurity layers, being isolated therefrom. When a photodiode formed in a light receiving part
10
senses external light, photoelectrons are generated to condense charges. These charges are transferred to a vertical transfer stage
20
and then gradually transferred to the horizontal transfer stage
30
in response to a clock signal applied to the vertical transfer stage. The transferred charges to the horizontal transfer stage
30
are transferred to a circuit of an output unit in response to a clock signal that is rapidly applied to the horizontal transfer stage
30
, thereby forming an amplified image signal.
The aforementioned clock signal is transferred to the horizontal transfer stage
30
through a gate electrode that is separated from a thin gate insulating layer. A voltage is divided into the specific steps, which are sequentially and periodically applied to the gate electrode. The gate electrode also is divided into parts that transfer charges of a predetermined width to the circuit of an output unit, forming a stepped potential thereby.
The amount of charges condensed in the light receiving parts
10
of the solid state imaging device is dependent upon an intensity or quantity of incident light. In some cases, charges which are produced in the light receiving parts
10
from a large quantity of incident light and transferred from the vertical transfer stage
20
to the horizontal transfer stage
30
, are so excessive as to prevent the proper transfer of charges from the horizontal transfer stage to an output unit.
An example of a structure for processing excessive charges transferred to a transfer stage is disclosed in U.S. Pat. No. 4,504,848. In the disclosed structure, a drain for discharging charges of a light receiving part is formed to produce remnant charges in an established active region for forming the light receiving part. A voltage barrier region is operable with a voltage whose level is identical to that of the light receiving part, and is set between a drain region and a general light receiving part. The drain is doped with one type of impurities whose concentration is higher than that of the light receiving part, and the barrier region has additive impurities of the other type.
In such a structure, although a voltage is applied equivalently to a general light receiving part and a barrier layer, the barrier layer is influenced less than the general light receiving part by the voltage. Within a constant voltage range, a charge processing capacity in a transfer mode (wherein a voltage is applied to a gate) is higher than that in a light receiving mode (wherein the voltage is applied thereto). If the charge processing capacity is lowered at a specific position of the vertical transfer stage, a vertical error can be prevented. Here, the vertical error is a brightness decay phenomenon at a region over the specific position.
A structure for discharging remnant charges to a drain through a barrier is disclosed in U.S. Pat. No. 5,455,443. In this case, a buffer zone is formed between a drain for discharging remnant charges and a barrier region to discharge the remnant charges. The buffer zone prevents the drain from discharging the remnant charges to vertical and horizontal transfer stages resulting from transient potential instability. In other words, charges are not transferred to a position where they must normally be transferred for images, preventing distortion of a display screen.
Another type of phenomenon relating to excessive charges occurs, for example, during special functions of an image pickup apparatus. In a conventional image pickup operation, the horizontal transfer stage cannot process photoelectrons that are excessively transferred while carrying out an electronic zooming function. This causes distortion of an upper part of a screen that is zoomed in.
Referring to
FIG. 2
, electronic zooming functions to output only a zoom area
40
to the exclusion of a remaining area of an overall pixel area
50
of a solid state imaging device. In a zoom mode, signal line electrons of intervals A and B are transferred in a short time to a horizontal transfer stage
30
in response to a clock signal of a fast vertical transfer stage. These electrons are discarded through reset-step transfer in which a screen is not composed. Electrons of a signal line in a zoom interval are transferred to a horizontal transfer stage
30
in response to a clock signal of a vertical transfer stage that is later than a general processing. Except for electrons in a column of the zoom area
40
, signal line electrons of a zoom interval are processed so that a screen is not composed by a high-frequency horizontal clock signal or other circuit arrangement. In proportion to a zoom ratio, only electrons in the zoom area
40
are processed in a circuitry section by a low-frequency clock signal to compose images of a display part.
By electrons generated and condensed in all pixels of a signal line of the A and B region in an electronic zoom mode, a large quantity of electrons rapidly transferred to the horizontal transfer stage
30
can be discharged through a reset drain of an output terminal along the stage
30
. Since a quantity of inflow electrons is temporarily greater than a discharge capacity of the horizontal transfer stage
30
, an effective potential of the stage
30
is rapidly lowered. As a result, a part of the electrons transferred to the stage
30
flows backwardly toward all the vertical transfer stages, as shown in a backflow area
30
of FIG.
3
.
The backflow electrons are mixed with electrons of the zoom area
40
. This causes a blooming phenomenon in which normal zoom images are not expressed in an upper scanning line of a display screen and the overall screen becomes bright.
FIG. 4A
depicts a horizontal transfer area and an adjacent field insulation area in a conventional solid state imaging device. FIG.
5
A through
FIG. 5C
are diagrams for describing formation of such a conventional solid state imaging device.
Referring to
FIG. 5A
, a thin gate insulating layer
105
is formed over a semiconductor subs
Jung Sang-Il
Lee Jun-Taek
Fourson George
Pham Thanh V
Volentine & Francos, PLLC
LandOfFree
Solid state imaging device for achieving enhanced zooming... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Solid state imaging device for achieving enhanced zooming..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Solid state imaging device for achieving enhanced zooming... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3162688