Phase comparator circuit and phase locked loop (PLL) circuit usi

Details Phase comparator circuit and phase locked loop (PLL) circuit usi Phase comparator circuit and phase locked loop (PLL) circuit usi

1992-09-14

1994-08-30

Wolfe, Willis R.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307516, 328133, H03K 526, HO3L 700

Patent

active

053430972

ABSTRACT:
A phase comparator circuit is constituted by a quadrant multiplier circuit and a DC compensation circuit. The quadrant multiplier circuit includes transistor pairs and outputs phase differences respectively of input data signals and clock signals. The DC compensation circuit has a variable current source and two transistor pairs whose collectors are connected respectively to a positive phase output and a reverse phase output from said quadrant multiplier circuit and whose emitters are connected to said variable current source. The phase comparator circuit thus arranged is capable of increasing a pulling-in range of the circuit.

REFERENCES:
patent: 3970868 (1976-07-01), Clements et al.
patent: 4006423 (1977-02-01), Kuniyoshi et al.
patent: 4614911 (1986-09-01), Kawano
patent: 4629914 (1986-12-01), Okanobu
patent: 5039889 (1991-08-01), Janta et al.

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