Computer system with interrupts transparent to its operating sys

Details Computer system with interrupts transparent to its operating sys Computer system with interrupts transparent to its operating sys

1992-10-22

1994-01-04

Ray, Gopal C.

Boots, shoes, and leggings

395375, 3642624, 3642632, 364246, 3642463, 364240, 3642329, 364DIG1, G06F 946, G06F 1200

Patent

active

052768880

ABSTRACT:
A transparent system interrupt is invoked by the assertion of an electrical signal at an external pin of a microprocessor CPU chip. Upon assertion of this interrupt, the CPU begins program execution in a dedicated RAM area that is inaccessible both to the operating system and all application programs. A set of instructions, which may be unique to the system in which the CPU chip is installed, services the interrupt. Typically, the state of the CPU and associated components in the system immediately prior to assertion of the interrupt will be saved into the dedicated RAM area by the interrupt service routine. Recovery from the interrupt is accomplished upon recognition of an external event that invokes a RESUME instruction causing the CPU and associated components to be restored to exactly the same state that existed prior to the interrupt and in a manner entirely transparent to any program executing at the time of the interrupt.

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