Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics
Reexamination Certificate
2001-08-21
2003-10-21
Pham, Long (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Passive components in ics
Reexamination Certificate
active
06635947
ABSTRACT:
BACKGROUND OF THE INVENTION
FIELD OF THE INVENTION
The present invention relates to a monolithically integrable inductor, which can be used, in particular, in a magnetoresistive random access memory (MRAM) configuration.
Although inductors are important elements of electrical circuits and are often indispensable in the circuits, a monolithically integrable inductor has still not been developed to date. Rather, for integrated circuits, inductors are formed by discrete components, which are connected to the integrated circuit.
One example of an integrated circuit in which magnetic fields and thus inductances are required consists in a MRAM configuration, which, if appropriate, has selection transistors. Such an MRAM configuration has a memory cell array of memory cells, which are disposed in a matrix-like manner and, for example, each contain a layer stack made of a hard-magnetic layer, a tunneling barrier layer and a soft-magnetic layer. The layer stacks are provided at crossover points between word lines and bit lines running perpendicularly to, and at a distance from, the word lines. The currents flowing in the word lines and bit lines generate magnetic fields which can change the magnetization direction of the soft-magnetic layer of the respectively selected memory cell in such a way that this is parallel or antiparallel to the magnetization direction of the hard-magnetic layer. A parallel magnetization of the soft-magnetic layer with respect to the hard-magnetic layer yields a lower resistance of the layer stack than an antiparallel magnetization of these layers. The different resistances of the layer stack can then be interpreted as an information unit of “0” or “1”.
On account of the progressive miniaturization of integrated circuits, the word line and the bit line of a selected memory cell, which generate the magnetic field that defines the magnetization direction of the soft-magnetic layer, are current-carrying lines having minimal dimensions which can thus only be utilized for currents in the mA range, which yield a correspondingly weak magnetic field, with the result that reliable determination of the magnetization direction in the soft-magnetic layer poses problems. In other words, the generation of local stronger magnetic fields by an integrable coil would be highly beneficial here, especially as the strength of the magnetic field could be brought to the desired level by way of the number of turns of the coil.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a monolithically integrable inductor which overcomes the above-mentioned disadvantages of the prior art devices of this general type, which, in particular, can advantageously be used in an MRAM configuration.
With the foregoing and other objects in view there is provided, in accordance with the invention, a monolithically integrated inductor. The inductor contains a layer sequence formed of a plurality of mutually respectively alternating conductive layers and insulating layers disposed such that the conductive layers and the insulating layers are stacked above one another. The insulating layers are formed in a whole-area manner and the conductive layers have central regions and edge regions contiguous with the central regions. The edge regions in successive ones of the conductive layers are offset relative to one another. Additional insulating layers are provided. One of the additional insulating layers is disposed in one of the central regions and the edge regions of each of the conductive layers. Contacts connect the conductive layers to one another through the insulating layers, the contacts between successive ones of the conductive layers are disposed in each case in the insulating layers in regions close to the edge regions. Giant magnetic resistance (GMR) materials are used. The layer sequence has a central region with a trench formed therein filled with the giant magnetic resistance materials forming a magnetoresistive random access memory (MRAM) cell. The central region of the layer sequence is defined by the central regions of the conductive layers.
The present invention thus provides a monolithically integrable inductor containing a plurality of mutually respectively alternating conductive and insulating layers and contacts that connect the conductive layers to one another through the insulating layers. In which the conductive and the insulating layers are stacked above one another and the insulating layers are formed in a whole-area manner, in which, moreover, in each conductive layer, the central region and an edge region contiguous with the latter are replaced by an additional insulating layer. In which, moreover, the edge regions in successive conductive layers are offset relative to one another, and in which, finally, the contacts between successive layers are in each case located between the layers in regions close to the edge regions.
The monolithically integrable inductor according to the invention thus forms, with a layer sequence containing the conductive and insulating layers, a coil whose area occupancy is given by “9F”, where F defines the minimum feature size. Such a layer sequence can readily be realized for example using customary CMOS technology, by stacking insulating layers made of e.g. silicon dioxide and conductive layers made of e.g. polycrystalline silicon above one another, e.g. aluminum being used for the contacts.
An MRAM cell can be formed by providing a trench in the central region, a layer stack made of a hard-magnetic layer, a tunneling barrier layer and a soft-magnetic layer being introduced into the trench. The layer stack is electrically isolated from the layer sequence containing the insulating layers and conductive layers by the remaining edge of the additional insulating layer forming the central region and is surrounded by the layer sequence, which forms a coil, with the result that a sufficiently strong magnetic field prevails in the layer stack when a corresponding signal having a current intensity in the mA range is applied to the coil containing the layer sequence.
A particularly effective coil is obtained if the edge regions in the successive conductive layers are offset with respect to one another in such a way that the conductive layers connected to one another via the contacts form a coil-type structure. In this case, the edge regions may be offset relative to one another by a regular angle in or counter to the clockwise direction. The angle may be about 90° if a total of four conductive layers are provided which are isolated from one another by three intervening insulating layers.
The layer stack in the trench is also designated as a giant magnetic resistance (GMR). The vertical configuration of the GMR in the trench allows the use of cells, which are a few &mgr;m long and, at the same time, have a minimal area requirement.
The trench can readily be introduced into the central region of the layer sequence, for example by deep etching (“deep trench etching”), in which e.g. the silicon dioxide of the additional insulating layers in the central region and of the insulating layers isolating these is removed.
The conductive layers are formed form polycrystalline silicon and the polycrystalline silicon can be doped. The layer sequence as a whole is formed on a semiconductor body.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a monolithically integrable inductor, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
REFERENCES:
patent: 4322698 (1982-03-01), Takahashi
patent: 5610433 (1997-03-01), Merrill et al.
patent: 6326314 (2001-12-01), Merrill
patent: 0 782 190 (1997-07-01), None
patent: 06204427 (1994-07-01), None
patent: 09-162354 (1997-06-01), None
patent: 10163422 (1998-06-01), None
patent:
Benedix Alexander
Braun Georg
Fischer Helmut
Klehn Bernd
Kuhne Sebastian
Farahani Dana
Greenberg Laurence A.
Infineon - Technologies AG
Locher Ralph E.
Pham Long
LandOfFree
Monolithically integrable inductor does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Monolithically integrable inductor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Monolithically integrable inductor will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3157761