Semiconductor device assembly techniques using preformed planar

Details Semiconductor device assembly techniques using preformed planar Semiconductor device assembly techniques using preformed planar

1995-06-05

1998-10-13

Monin, Donald

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified configuration

257778, 257779, H01L 2348, H01L 2944

Patent

active

058216243

ABSTRACT:
An interposer (preformed planar structure) is disposed between a die and a substrate (which may be another die). Through holes in the interposer facilitate controlled formation of electrical connections between the die and the substrate. In one embodiment, the through-holes in the interposer are filled flush with a resilient plastic conductive material and pressed against raised conductive structures on the die and substrate. The die, interposer, and substrate are maintained in electrical contact under compression. The compressing force can be removed to replace the die. In another embodiment, the interposer has embedded conductive elements which make contact with selected connections between the die and the substrate. Electrical connections between the conductive elements can be selectively effected to provide for "re-wiring" of connections to the die and substrate. Another similar embodiment is directed to using embedded termination networks to provide integral termination for signals between the die and substrate. Various other embodiments are directed to providing grooves on the surface of the interposer to facilitate the flow of a cooling gas, and to forming plastic conductive connections between a die and a substrate in a flip-chip assembly using an interposer.

REFERENCES:
patent: 4664309 (1987-05-01), Allen et al.
patent: 4811082 (1989-03-01), Jacobs et al.
patent: 5283468 (1994-02-01), Kondo et al.

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