Semiconductor logic integrated circuit having improved noise mar

Details Semiconductor logic integrated circuit having improved noise mar Semiconductor logic integrated circuit having improved noise mar

1993-01-29

1994-08-30

Hudspeth, David R.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, H03K 1708

Patent

active

053430913

ABSTRACT:
A semiconductor logic integrated circuit of this invention comprises a source follower-type switching stage A in which loads MESFET-Q.sub.LU and MESFET-Q.sub.LD are provided for the drain and source of a switching MESFET-Q.sub.SW, respectively, a push-pull-type buffer stage C composed of a pull-up MESFET-Q.sub.PU and a pull-down MESFET-Q.sub.PD, and a feedback stage B provided between those two stages, which contains a MESFET-Q.sub.FB for feedback control of the output potential and a level-regulating diode D.sub.2.

REFERENCES:
patent: 4800303 (1989-01-01), Graham et al.
patent: 4810969 (1984-03-01), Fulkerson
patent: 4926071 (1990-05-01), MacMillan et al.
patent: 4935647 (1990-06-01), Lankins
patent: 4965464 (1990-10-01), Von Basse et al.
patent: 5077494 (1991-12-01), Bowers et al.
patent: 5077496 (1991-12-01), Wolczanski
Yu et al., "Low Power 2K-Cell SDFL Gate Array and DCFL Circuits Using GaAs Self-Aligned E/D Mesfets", IEEE J.S.S.C., vol. 23, No. 1, Feb. 1988, pp. 224-238 (307/450).
Proceedings of the IEEE 1991 Custome Integrated Circuits Conference, May 1991, Norio Higashisaka, et al., pp. 14.6.1 to 14.6.4, "A Quasi-Complementary-Logic GaAs Gate Array Emplo Lization Technology".
Proceedings of the IEEE 1990 Custom Integrated Circuits Conference, May 1990, W. B. Leung, et al., pp. 24.8.1 to 24.8.3, "3.5K Gate 32-Bit Alu Using GaAs HFET Technology".
IEEE Journal of Solid-State Circuits, vol. 26, No. 1, Jan. 1991, pp. 70-74, David E. Fulkerson, "Feedback FET Logic: A Robust, High-Speed, Low-Power GaAs Logic Family".

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