Fluid ejection device

Incremental printing of symbolic information – Ink jet – Ejector mechanism

Reexamination Certificate

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Reexamination Certificate

active

06582063

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATIONS
Not Applicable.
STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT
Not Applicable.
REFERENCE TO AN APPENDIX
Not Applicable.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to thin film processes, more specifically to thin film processes for the fabrication of ink-jet printhead structures, and particularly an improved method for fabrication of thermal ink-jet printhead drop generator arrays and an ink-jet printhead fabricated in accordance with the method.
2. Description of Related Art
The art of ink-jet technology is relatively well developed. Commercial products such as computer printers, graphics plotters, copiers, and facsimile machines employ ink-jet technology for producing hard copy. The basics of this technology are disclosed, for example, in various articles in the Hewlett-Packard Journal, Vol. 36, No. 5 (May 1985), Vol. 39, No. 4 (August 1988), Vol. 39, No. 5 (October 1988), Vol. 43, No. 4 (August 1992), Vol. 43, No. 6 (December 1992) and Vol. 45, No.1 (February 1994) editions. Ink-jet devices are also described by W. J. Lloyd and H. T. Taub in
Output Hardcopy [sic] Devices
, chapter 13 (Ed. R. C. Durbeck and S. Sherr, Academic Press, San Diego, 1988).
A simplistic schematic of a swath-scanning ink-jet pen
100
is shown in
FIG. 1
(PRIOR ART). The body of the pen
101
generally contains an ink accumulator and regulator mechanism
102
. The internal ink accumulator—or ink accumulation chamber—and associated regulator
102
are fluidically coupled
103
to an off-axis ink reservoir (not shown) in a known manner common to the state of the art. The printhead
104
element includes appropriate electrical connectors
105
(such as a tape automated bonding, “flex tape”) for transmitting signals to and from the printhead. Columns of individual nozzles
106
form an addressable firing array
107
. The typical state of the art scanning pen printhead may have two or more columns with more than one-hundred nozzles per column. The nozzle array
107
is usually subdivided into discrete subsets, known as “primitives,” which are dedicated to firing droplets of specific colorants on demand. In a thermal ink-jet pen, an ink drop generator mechanism includes a heater resistor subjacent each nozzle
106
with an ink chamber therebetween. Selectively passing current through a resistor superheats ink to a cavitation point such that an ink bubble's expansion and collapse ejects a droplet from the associated nozzle
106
.
The ever increasing complexity and miniaturization of TIJ nozzle arrays has led to the use of silicon wafer integrated circuit technology for the fabrication of printhead structures. For the purpose of the present invention, the “frontside” of a silicon wafer, or wafer printhead die region, is that side having drop generator elements; the “backside” of a silicon wafer, or wafer printhead die region, is the opposite planar side, having ink feed channels (also referred to simply as “trenches”) fluidically coupled by ink feed holes through the silicon wafer to the drop generator elements. It is generally desirable in any integrated circuit (IC) thin film process to minimize masking steps to reduce cost and complexity.
FIG. 2
(PRIOR ART) is an illustration of a highly magnified cross-section of a thermal ink-jet printhead structure
200
. It should be recognized that these illustrations are schematics for a very small region of a silicon wafer which may be many orders of magnitude greater in dimension to the shown die region. Many publications describe the details of common techniques used in the fabrication of complex, three-dimensional, silicon wafer based structures; see e.g.,
Silicon Processes
, Vol. 1-3, copyright 1995, Lattice Press, Lattice Semiconductor Corporation (assignee herein), Hillsboro, Oreg. Moreover, the individual steps of such a process can be performed using commercially available fabrication machines. The use of such machines and common fabrication step techniques will be referred to hereinafter as simply: “in a known manner.” As specifically helpful to an understanding of the present invention, approximate technical data are disclosed herein based upon current technology; future developments in this art may call for appropriate adjustments as would be apparent to one skilled in the art.
Historically, the thin film process for forming such a structure
200
consisted of a nine mask process, four for transistor(s) formation and five for ink drop generator(s) formation. In order for the transistor formation are the active region mask, the polysilicon mask, the contact mask, and the substrate contact mask. The “substrate contact” is used to ground the silicon and the body of the MOSFET devices.
An orifice plate
201
overlays a printhead barrier layer
203
in a manner such that ink
205
from a supply (now shown) accumulates in a drop firing chamber in a nozzle
106
(
FIG. 1
) superjacent a heater/firing resistor
207
. An electrical contact lead
209
, in this embodiment a layer of gold
209
′ superjacent a layer of tantalum
209
″, is connected via an aluminum/tantalum-aluminum trace
211
to a MOSFET
213
device formed in the surface of a silicon substrate
215
. The MOSFET device
213
is drain is coupled to the firing resistor
207
via another aluminum-tantalum/aluminum trace
211
′. Control signals to the transistor
213
selectively turn such heater resistors on and off to eject ink drops from the array
107
(
FIG. 1
) in accordance with the digital data for dot matrix printing.
In forming the heater/firing resistor driver MOSFET
213
as shown in
FIG. 2
the contacts and substrate contacts in the state of the art are formed by the steps shown in
FIGS. 3A
,
3
B and
3
C (PRIOR ART).
FIG. 3A
shows a cross-section depiction having a plurality of partial formed MOSFETS immediately after the contact etch step has been performed. Based on a superjacent photoresist mask layout of a third mask in the overall process, this contact etch step selectively removes phosphosilicate glass(“PSG”) down into the source/drain down to the source/drain regions of the doped substrate so that in subsequent steps, when aluminum/tantalum-aluminum for the traces
211
,
211
′,
FIG. 2
, is deposited, the metal is in contact with each source/drain region. The contact etch also makes a hole in the PSG over the substrate contacts, but the etch stops on the polysilicon
301
. As demonstrated by
FIGS. 3B and 3C
, a separate photoresist mask
303
(fourth, or “substrate contact”) must be used to etch the polysilicon and gate oxide to create a substrate contact, metal-to-silicon. In other words, note that substrate contacts require a special mask because the contacts have to go through an oxide, PSG, polysilicon, and gate oxide. Thus, it is important to note that the contact etch cannot be used by itself to make the substrate contacts because if the etch reaction is changed to also remove the polysilicon superjacent the substrate contact region, it would etch into the silicon in the source/drain contacts. At best, this would at least create unacceptable reliability problems during operation. At the worst it could make the device unusable, destroying wafer yield.
Thus, there is a need for an improved process for fabricating thermal ink-jet printheads.
BRIEF SUMMARY OF THE INVENTION
In a thermal ink-jet printhead fabrication, the substrate contact design is modified to remove a polysilicon layer in each substrate contact region. A thick layer of silicon dioxide is grown under the substrate contact to prevent doping of the underlying silicon that would create a high resistance path between the substrate contacts and the drive transistor. The substrate contact etch is modified to etch selectively for a relatively longer time so that field oxide is etched in addition to a PSG layer, thereby creating a substrate contact.
In its basic aspect, the present invention provides an ink-jet printhead fabrication method using a silicon wafer subs

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