Timing variation measurements

Details Timing variation measurements Timing variation measurements

2002-05-08

2003-12-30

Le, N. (Department: 2858)

Electricity: measuring and testing

Measuring, testing, or sensing electricity, per se

Analysis of complex waves

C324S076530, C324S076770, C375S226000, C375S376000

Reexamination Certificate

active

06670800

ABSTRACT:

BACKGROUND
This invention relates to timing variation measurements.
Phase lock loop (PLL) circuits are used in a wide variety of applications such as frequency synthesis, timing recovery, clock distribution and phase demodulation. Those applications are sometimes employed, for example, in optical fiber links, wireless telephones and computers. Timing variations of the PLL circuits, such as the jitter, can adversely affect the performance of the PLL circuits and the application in which the PLL circuits are used. Thus, accurate and cost effective measurement of such timing variations or jitter is critical to current high-speed applications.


REFERENCES:
patent: 4164648 (1979-08-01), Chu
patent: 5663991 (1997-09-01), Kelkar et al.
patent: 5793822 (1998-08-01), Anderson et al.
patent: 6295315 (2001-09-01), Frisch et al.
Sunter, S., Aubin, R., “BIST for Phase-Locked Loops in Digital Applications, ” Jan. 1999, IEEE, LogicVision, Inc., Ottawa, Canada, pp. 532-540.

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