Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2001-06-29
2003-06-03
Lebentritt, Michael S. (Department: 2824)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185140, C365S185210
Reexamination Certificate
active
06574145
ABSTRACT:
BACKGROUND
Several methods are known for programming non-volatile memory cells. One method applies a programming pulse of a sufficiently long duration to guarantee that the memory cell will be programmed. In order to guarantee that every memory cell will be programmed using this method, programming time and power are set for worst-case conditions. Accordingly, this “over-provisioning” approach can result in excessive average programming time, power, and energy. In another method, a series of short, high-voltage programming pulses is applied to the memory cell. After each programming pulse, a nominal-voltage reading pulse is applied to determine whether the memory cell is in a programmed state. If the memory cell is in a programmed state, no further programming pulses are applied. Otherwise, an additional programming pulse is applied, and the sequence of reading and programming continues until the memory cell is in a programmed state. One disadvantage of this approach is the time and power overhead associated with switching between program and read voltages. Additionally, because the time-dependent dielectric breakdown (TDDB) for programmable read-only (PROM) type memory cells increases with multiple, short programming pulses (as compared to a long, continuous programming pulse), this approach can result in excessive programming energy. The time delays associated with these approaches can be especially noticeable to a user when the memory cell is part of a field-programmable memory device used with portable consumer products, such as digital cameras.
There is a need, therefore, for a memory device and method that will overcome the disadvantages described above.
SUMMARY
The present invention is defined by the following claims, and nothing in this section should be taken as a limitation on those claims.
By way of introduction, the preferred embodiments described below provide a memory device and method for sensing while programming a non-volatile memory cell. In one preferred embodiment, a memory device is provided with a memory cell and a detection circuit. While the memory cell is being programmed, the detection circuit determines whether the memory cell is in a programmed state. If the memory cell is in a programmed state, the programming of the memory cell is terminated. As compared with prior programming approaches, this preferred embodiment reduces programming time and power while increasing programming bandwidth (the number of memory cells that can be programmed per unit time). In another preferred embodiment, a plurality of memory cells along a wordline are programmed simultaneously. Other preferred embodiments are provided, and each of the preferred embodiments can be used alone or in combination with one another.
The preferred embodiments will now be described with reference to the attached drawings.
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Cleeves James M.
Kleveland Bendik
Scheuerlein Roy E.
Brinks Hofer Gilson & Lione
Lebentritt Michael S.
Matrix Semiconductor Inc.
Nguyen Hien
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