Method and system for error tolerant synchronization character d

Details Method and system for error tolerant synchronization character d Method and system for error tolerant synchronization character d

1993-06-14

1996-01-16

Envall, Jr., Roy N.

Excavating

371 42, 360 722, G06F 1100, H04L 1200

Patent

active

054854768

ABSTRACT:
An error tolerant detection of multibit synchronization characters within data blocks in a data storage system. Each detected prospective multibit synchronization character is compared to an expected multibit synchronization character for an identical match and for a match which includes a variation of no greater than two adjacent bits. A synchronization character is then considered to be identified in response to a successful exact comparison or, if relaxed detection is enabled, in response to a successful comparison indicating that the detected prospective multibit synchronization character does not differ from the expected multibit synchronization character by an error greater than two adjacent bits. For Read While Write operation in which it is imperative that the synchronization characters be written initially without error, the relaxed detection scheme may be selectively disabled, requiring the synchronization characters to achieve an exact match with the expected synchronization character.

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