Power-on reset system and a semiconductor memory device incorpor

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307603, 3281291, 377 20, H03K 1728

Patent

active

053430859

ABSTRACT:
A power-on reset system comprises one-shot pulse generator for generating a one-shot pulse signal in response to a change in the power supply potential, a flip-flop to be set to operate by a one shot pulse signal and a timer to be activated by an output signal of said flip-flop operating as an enable signal for timing a given period of time. An output signal of said timer operates to reset the flip-flop so that the output of said flip-flop is utilized as a system reset signal. The timer includes an oscillator and a counter for counting oscillation signals. A voltage step-up means has an input responsive to the oscillation signals. With such an arrangement, the overall surface area of an LSI incorporating the system is minimized and a sufficiently long reset period is ensured for it.

REFERENCES:
patent: 3532993 (1970-10-01), Kennedy
patent: 3742257 (1973-06-01), Wittenzelner
patent: 4001608 (1977-01-01), Zuk
patent: 4134027 (1979-01-01), Scott et al.
patent: 4825407 (1989-04-01), Loessel et al.
patent: 5086237 (1992-02-01), Matsumoto

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