Semiconductor device

Details Semiconductor device Semiconductor device

2000-09-29

2003-10-07

Potter, Roy (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

C257S741000

Reexamination Certificate

active

06630740

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device and a method for fabricating the device, and in particular, to a semiconductor device that has a wiring layer constructed principally of copper and a low dielectric constant insulating film and a method for fabricating the device.
In recent years, as the semiconductor devices are made finer and denser in terms of integration, the wiring is provided in a plurality of layers and concurrently the wiring width and wiring interval become reduced. For the above reasons, wiring delay occurs to reduce the operating speed of the semiconductor device due to (1) an increase in wiring resistance and (2) an increase in wiring capacitance (line capacitance and interlayer capacitance).
Accordingly, there is a growing demand for reducing the wiring resistance and the wiring capacitance. In order to prevent the occurrence of the wiring delay of a semiconductor device, there are the following proposals (1) and (2).
(1) In order to reduce the wiring resistance, the wiring material is changed from an aluminum-based material (resistivity of Al: 3 &mgr;&OHgr;cm) to a copper material or a material made principally of copper (resistivity of Cu: 1.8 &mgr;&OHgr;cm)
(2) In order to reduce the wiring capacitance, the silicon oxide film (dielectric constant k=4) is changed to a low dielectric constant insulating film (dielectric constant k<3).
However, according to the above kind of bilayer structure in which the copper wiring and the low dielectric constant insulating film are put in direct contact with each other, there is a concern about the diffusion of copper atoms of the copper wiring into the low dielectric constant insulating film. Accordingly, there has been a conventional semiconductor device fabricating method for forming a barrier film between copper and the low dielectric constant insulating film for the prevention of the diffusion of copper by the barrier film. The barrier film is provided by either a metal barrier film or an insulating barrier film, according to use. Examples of the metal barrier film include a pure tantalum film (Ta), a tantalum nitride film (TaN), a titanium nitride film (TiN) and a tungsten nitride film (WN). Such a metal barrier film is principally used on the side surfaces and the bottom surfaces of the copper wiring in order to prevent the diffusion of copper into the insulating film, improve the adhesion of copper and achieve conduction with lower layer wiring. Examples of the insulating barrier film include a silicon nitride (SiN) film and a silicon oxy-nitride (SION) film, which function as a copper diffusion block, and PSG (Phospho Silicate Glass) film for preventing the diffusion by trapping the diffused copper. Such an insulating barrier film is principally used for the upper portion of the copper wiring.
FIGS. 2A through 2E
are process charts showing the conventional semiconductor device fabricating method, where are shown a lower layer conductive portion
31
, a low dielectric constant insulating film
32
made of, for example, SiOF and SiOC, wiring grooves
33
, connection holes
34
, a metal barrier film
35
, a copper wiring film
36
and an insulating barrier film
37
.
The conventional semiconductor device is fabricated as follows.
First, as shown in
FIG. 2A
, the low dielectric constant insulating film
32
is deposited to a thickness of 600 to 900 nm on a lower layer conductive portion
31
, and thereafter, the wiring grooves
33
that become wiring portions are formed on the low dielectric constant insulating film
32
. Next, as shown in
FIG. 2B
, the connection holes
34
are formed by etching in the desired positions of the wiring grooves
33
. Then, as shown in
FIG. 2C
, the metal barrier film
35
is deposited to a thickness of 10 to 50 nm by the CVD (Chemical Vapor Deposition) method or the sputtering method so as to entirely cover the surfaces of the bottom portions and the side wall portions of the wiring grooves
33
and the connection holes
34
. Then, as shown in
FIG. 2D
, the copper wiring film
36
is deposited by the CVD method or the plating method so as to entirely cover the wiring grooves
33
and the connection holes
34
, which are the opening portions. Finally, as shown in
FIG. 2E
, the portions that belong to the metal barrier film
35
and the copper wiring film
36
and are located above the wiring grooves
33
and the connection holes
34
are removed by the CMP (Chemical-Mechanical Polishing) method to flatten the surfaces of the low dielectric constant insulating film
32
, the metal barrier film
35
and the copper wiring film
36
, and thereafter, the insulating barrier film
37
is deposited on the low dielectric constant insulating film
32
.
In the semiconductor device having the dual damascene structure shown in
FIG. 2E
, the effective copper wiring resistance becomes high since the volume of the copper wiring film
36
occupying the wiring region is reduced unless the metal barrier film
35
is made thinner as the device is made finer. Therefore, if the effective copper wiring resistance is reduced by reducing the metal barrier film
35
to a thickness of, for example, about 5 nm, then the barrier property of the metal barrier film
35
with respect to Cu diffusion is lost, causing a problem that Cu diffuses into the low dielectric constant insulating film to disadvantageously increase the leak and the dielectric constant. In fact, if the dual damascene structure as shown in
FIG. 3
is formed, then the metal barrier film
35
comes to have the smallest thickness of not greater than 5 nm on the side walls of the connection holes
34
, according to which the barrier property of the metal barrier film
35
is most weakened.
On the basis of the aforementioned results, the low dielectric constant insulating film
32
itself constructed of a line insulating film
42
and an interlayer insulating film
43
is required to have a barrier property, and in particular, the interlayer insulating film
43
having the connection hole
34
necessitates a barrier property.
Accordingly, it can be considered to employ an SiO
2
film containing hydrocarbon, a PSG film or the like as the low dielectric constant insulating film
32
. The SiO
2
film containing hydrocarbon has a low dielectric constant. However, the SiO
2
film containing hydrocarbon has the problem that the film has an insufficient barrier property with respect to the copper diffusion. The PSG film, which has a diffused copper trapping ability, becomes a diffusion barrier (mentioned in Journal of Electrochemical Society, 139, 11, p. 3264, 1992, H. Miyazaki, H. Kojima, A. Hiraiwa and Y. Homma). However, the PSG film has the drawback that it has a dielectric constant equivalent to that of SiO
2
and high water absorptively. Moisture absorbed by the above-mentioned high water absorptivity promotes the increase in dielectric constant and copper ionization (corrosion). Taking the fact that the diffusion of Cu in the insulating film and, in particular, the diffusion of Cu during the application of a bias is performed in the form of copper ions into consideration, there is the drawback that the Cu trapping effect peculiar to the phosphorus glass is canceled.
In the case of MOSLSI (Metal Oxide Semiconductor Large Scale Integrated Circuit), an increase in operating speed and a reduction in power voltage are achieved concurrently as the semiconductor devices are made finer, and this leads to a reduction in margin with respect to noises. If the distance between adjacent wiring lines is reduced, then signals of the adjacent wiring lines propagate as noises to the adjacent wiring lines through the capacitance between the wiring lines to cause potential fluctuations, increasing the possibility of causing an erroneous circuit operation. In other words, there is the problem that the cross-talk noise is increased.
FIG. 4
shows a conceptual diagram of the above-mentioned circuit. In
FIG. 4
, a line capacitance C
1
between a wire
101
and a wire
102
is conceptually illustrated by a capa

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