Horizontal synchronization for digital television receiver

Television – Synchronization – Automatic phase or frequency control

Reexamination Certificate

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Details

C348S348000, C348S544000, C348S540000

Reexamination Certificate

active

06573944

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates to the field of horizontal synchronization in digital television receivers.
Analog video signals have a horizontal synchronizing and scanning frequency of approximately 15.735 KHz in the NTSC system. This synchronizing and scanning frequency is different in the PAL and SECAM systems, but is generally comparable. Irrespective of the system, this is generally referred to as a standard horizontal synchronizing and scanning frequency, often denoted as fH or 1 fH. Television receivers providing progressive scanning rather than interlaced scanning operate at twice the standard synchronizing frequency, approximately 31.47 KHz in NTSC, often denoted as 2 fH. Such television receivers upconvert the analog video input using digital circuits that double the number of horizontal lines per field, either by repeating each line or by interpolation. A phase detector is utilized to synchronize the 2 fH deflection circuit with the 1 fH input video signal.
Digital television receivers, for example those designed to process video signals in the MPEG2 format, can have horizontal synchronization circuits operating at 2.14 fH, approximately 33.75 KHz. The circuits for processing an MPEG2 signal include a time base correction function that obviates the need for a phase detector. Instead, a binary rate multiplier responsive to a microprocessor controls an oscillator, which in turn drives a number of counters that divide the oscillator output down to the desired horizontal drive frequency. The upconverted video data is written into and read from a memory in such a way that time base correction is provided.
It was thought that in a digital television receiver operating at 2.14 fH, standard 1 fH video could simply be upconverted to 2.14 fH instead of 2 fH; and indeed, the upconversion presented no special difficulties. However, a number of unanticipated problems were encountered when displaying the upconverted video at 2.14 fH. One of the problems encountered stemmed from the coupling of the deflection voltages and currents into the 1 fH NTSC signal paths into the television receiver, for example from the antenna, from a video cassette recorder and from a DVD player. This is similar to signal pickup or coupling that can happen internally to the television receiver, for example by ground loops on circuit boards. The third wire ground of the television receiver or of the externally connected components can also contribute to this signal pickup. Under this condition the 2.14 H deflection currents and/or voltages are asynchronous with respect to the input NTSC signal being displayed and the coupled signal appears in the scanned raster as an interference similar to horizontal bars.
It was found that this effect can be reduced by operating the deflection circuit at 2 fH instead of 2.14 fH. Under this condition the coupled interference is reduced in visibility but is still present and can be seen in the raster as vertical bars moving horizontally, similar to horizontal shading except that the moving bars are not locked to scan. The unwanted coupled signal is moving because the upconversion process does not maintain the horizontal phase relationship of the display section output to the incoming NTSC signal. While the upconverted NTSC is close in frequency to the 2 fH scanned raster these signals are not at the identical frequency and they are not synchronized in phase.
Accordingly, a solution was needed that would enable a digital television receiver to display digital video signals, for example in MPEG2 format, at 2.14 fH and to display standard video signals, for example NTSC, in an upconverted, progressively scanned format.
The visibility of the interference due to upconverted scanning even at 2 fH, instead of 2.14 fH, can be further reduced by phase/frequency locking the 2 fH deflection to the incoming 1 fH signal. This reduces any deflection generated coupled signal to stationary interference on the raster display. In accordance with this solution the 1 fH synchronizing/drive signal obtained from the 1 fH video input signal is compared to the 2 fH deflection drive pulse in a phase detector. The output of the phase detector is then used to control the frequency of a voltage controlled oscillator. The display pixel clock for the MPEG2 video signal is derived from the VCO, and accordingly, controlling its frequency permits closing the phase locked loop to bring the 2 fH deflection in phase/frequency lock with the 1 fH NTSC input horizontal synchronizing component.
However, this solution posed a further problem of needing to operate the television receiver at two different horizontal scanning frequencies for different kinds of video input signals, for example digital video signals in MPEG2 format at 2.14 fH and analog video signals in NTSC, PAL or SECAM format at 2 fH.
SUMMARY OF THE INVENTION
A horizontal synchronizing system in accordance with the inventive arrangements, that solves the problems faced by the prior art, comprises: a source of a horizontal synchronizing signal; a source of first and second higher frequency horizontal drive signals; a source of a first control voltage; a source of a second control signal; and, said source of said drive signals having a phase-locked mode of operation at said first higher frequency responsive to said first control signal and a phase-unlocked mode of operation at said second higher frequency responsive to said second control signal.
The system can further comprise means for phase locking said first drive signal with said source of said horizontal synchronizing signal.
The source of said drive signals can comprises a controllable oscillator.
The oscillator can advantageously operate at the same frequency responsive to both said first and second control signals.
The source of said drive signals can advantageously further comprise counters clocked by the oscillator and supplying different numbers of samples during blanking at said first and second higher frequencies respectively.
Another horizontal synchronizing system in accordance with the inventive arrangements, that solves the problems faced by the prior art, comprises: a source of a horizontal synchronizing signal; a source of first and second higher frequency horizontal drive signals; a phase detector for generating a first control voltage responsive to said horizontal synchronizing signal and said first horizontal drive signal; a source of a second control signal; and, a switch for selectively supplying said first control signal to said source of said drive signals for a phase-locked mode of operation at said first higher frequency and supplying said second control signal to said source of said drive signals for a phase-unlocked mode of operation at said second higher frequency.
The source of the drive signals can comprise: a voltage controlled oscillator; and, counters for supplying different numbers of samples during blanking at said first and second higher frequencies respectively.
The source of said second control signal can comprise: a binary rate multiplier; and, a binary rate multiplier filter.
The system can advantageously further comprise a circuit responsive to said drive signals for and generating a pulse width stretched timing signal as an input to said phase detector, in order to control the response speed of the phase locked loop.
A horizontal synchronizing system in accordance with a presently preferred embodiment comprises: a source of an fH horizontal synchronizing signal; a source of nfH and mfH horizontal drive signals, where n≧2, m≧2 and n is an integer; a phase detector for generating a first control signal responsive to said fH horizontal synchronizing signal and said nfH horizontal drive signal; a source of a second control signal; and, a switch for selectively supplying said first control signal to said source of said drive signals for a phase-locked mode of operation at nfH and supplying said second control signal to said source of said drive signals for a phase-unlocked mode of operation at mfH. The factor n can be equal to 2 an

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