Active solid-state devices (e.g. – transistors – solid-state diode – Incoherent light emitter structure – Encapsulated
Reexamination Certificate
2001-10-17
2003-11-18
Elms, Richard (Department: 2824)
Active solid-state devices (e.g., transistors, solid-state diode
Incoherent light emitter structure
Encapsulated
C257S615000, C257S778000, C257S787000, C438S114000, C438S127000
Reexamination Certificate
active
06649941
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention is directed to a method of manufacturing a sealed device having a Group III nitride compound semiconductor and connectable to an external source. More particularly, the invention is directed to a method of manufacturing a sealed flip-chip-type device and a sealed wire-bonding-type device not to be required separate sealing steps and to constitute a self-contained package which is electrically connectable to an external source.
2. Description of the Related Art
Flip-chip-type devices and wire-bonding-type devices containing Group III nitride compounds as semiconductors are known in the art. An example of such a flip-chip-type device is shown in
FIG. 6A
, in which the flip-chip-type device is designated by reference numeral
100
.
Referring to
FIG. 6A
, a plurality of flip-chip-type device units
100
are integrated by a common Group III nitride compound semiconductor substrate
10
carrying a plurality of positive electrodes
11
and negative electrodes
12
. As shown in
FIG. 6A
, during manufacturing the Group III nitride compound semiconductor substrate
10
is divided by an appropriate technique into a plurality of flip-chip-type devices
100
, each of which comprises a segment of the Group III nitride compound semiconductor substrate
10
, one of the positive electrodes
11
, and one of the negative electrodes
12
.
The flip-chip-type device
100
is then connected to an external member (or source)
6
and sealed by known techniques. Two examples of known techniques for making this connection are respectively shown in
FIGS. 6B and 6C
, in which the flip-chip-type device
100
is shown in an inverted position and connected to the external member
6
.
According to first conventional technique depicted in
FIG. 6B
, the connection between the device
100
and the external member
6
is accomplished by forming bumps
1
on the external member (or frame)
6
. One of the bumps
1
connects the positive electrode
11
to a first electrode of the external member
6
, and the other of the bumps
1
connects the negative electrode
12
of the flip-chip-type device
100
to the second electrode of the external member
6
. These bumps
1
comprise a gold ball or solder. After this connection is made, the flip-chip-type device
100
and a surface portion of the external member
6
are encased or sealed with a resin
3
.
According to the second conventional technique depicted in
FIG. 6C
, first and second electrodes
21
and
22
of an internal member (or subframe)
20
patterned on the internal member
20
are connected respectively to the positive electrode
11
and the negative electrode
12
of the flip-chip-type device
100
. Bumps
1
serve as electrical connection bridges for electrically connecting the first electrode
21
to the positive electrode
11
and the second electrode
22
to the negative electrode
12
. Then, the internal frame
20
is attached to the external member (or frame)
6
via a conductive adhesive
4
and the electrode
21
is connected to a wire bonding
5
. The device
100
, the internal member
20
, the conductive adhesive
4
, the wire bonding
5
, and a portion of the external member
6
are sealed together by the resin
3
.
In each of the conventional techniques illustrated in
FIGS. 6A and 6B
, the resin
3
, which is laminated after the flip-chip-type device
100
has been connected to the external member
6
, leaves an empty gap
33
either between the device
100
and the external member
6
(in the first conventional technique of
FIG. 6B
) or between the device
100
and the internal frame
20
(in the second conventional technique of FIG.
6
C). In order to prevent the gap
33
from forming, a specific resin, i.e., an underfill material, is used to fill the gap
33
area prior to sealing the entire surface of the device
100
. The underfill material means that the resin has a low viscosity and a high fluidity.
The need to practice this additional filling step to prevent the formation of gaps
33
inherently obtained by these conventional techniques increases the costs of manufacture by increasing processing time. It would be a significant improvement in the art to provide a process in which the manufacturing efficiency is increased by avoiding the need for this filling step and avoiding the need for separate inspection checks to inspect, on an individual basis, the adequacy of the seal of each of the separate devices
100
.
And with respect to the wire-bonding-type light-emitting device, sealing step by resin is carried out after separating the device into each chips.
SUMMARY OF THE INVENTION
It is, therefore, an object of this invention to improve the productivity and efficiency of a semiconductor device manufacturing process for a sealed flip-chip-type device and a wire-bonding-type device having a Group III nitride compound semiconductor by avoiding the need for a separate sealing step.
Another object of this invention is to simplify quality assurance checks by consolidating the need for separately inspecting the sealing resin laminated on the sealed flip-chip-type device and the wire-bonding-type device into a single inspection process, in which the sealing resin of the devices is inspected while the devices share a common substrate.
In accordance with an embodiment of this invention, these and other objects are achieved by a method for manufacturing a sealed flip-chip-type device and a wirebonding type device. According to an embodiment of this method, a plurality of semiconductor device units integrated together on a common substrate having a Group III nitride compound semiconductor layer is provided. Each of the semiconductor device units comprises a positive electrode and a negative electrode. A curable sealing resin is laminated on a surface of the common substrate on which electrodes are formed so as to at least partially seal the electrodes. Then, the resin is cured. Thereafter, the common substrate having the cured sealing resin is divided into a plurality of individual semiconductor devices, with each of the semiconductor devices comprising a segment of the substrate and at least one positive electrode and at least one negative electrode. Because the positive and negative electrodes are commonly formed on the same side of the Group III nitride compound layer, the sealing resin need only be laminated and cured on one side of the Group III nitride compound layer, i.e., on the side on which the electrodes are formed. The opposite side (without the electrodes) of the Group III nitride compound layer does not require lamination with the sealing resin, since Group III nitride compound layers generally are characterized by high stability and durability.
In accordance with one modification to this embodiment, metal pillars or bonding pads are formed (for example, by plating) on the surface of the electrodes of the flip-chip-type device units and the wire-bonding units prior to laminating and curing the resin. The metal pillars or bonding pads are thereafter generally surrounded by the cured resin, except at an exposed portion, at which the metal pillars or bonding pads are electrically connectable to an external member. Because the external member is not connected to the device at the time of resin lamination and curing, the external member does not obstruct the lamination step and, as a consequence, air gaps formed between the sealed flip-chip-type device and the external or internal member is eliminated.
In accordance with another embodiment of this invention, a method is provided for manufacturing a plurality of sealed semiconductor devices and thereafter individually connecting the semiconductor devices to respective external sources. According to this method, there is provided a plurality of semiconductor device units integrated together on a common substrate having a Group III nitride compound semiconductor layer, each of the semiconductor device units comprising a positive electrode and a negative electrode. First and second metal pillars are formed on the posi
Elms Richard
McGinn & Gibb PLLC
Toyoda Gosei Co,., Ltd.
Wilson Christian D.
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