Method of fabricating a liquid crystal-on-silicon backplane

Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Making emissive array

Reexamination Certificate

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C438S030000, C349S139000

Reexamination Certificate

active

06521475

ABSTRACT:

BACKGROUND OF INVENTION
1. Field of the Invention
The present invention relates to a method of fabricating a Liquid Crystal-on-Silicon (LCoS) backplane, and more particularly, to a method of fabricating spacers and crossover pads of the LCos backplane together.
2. Description of the Prior Art
Liquid Crystal-on-Silicon micro-display technology is the key of reflective LCoS projectors and rear-projection televisions. The advantage of LCoS micro-displays is tiny,high resolution, low power, low cost, etc. The difference between a LCoS micro-display and a conventional thin film transistor-liquid crystal display (TFT-LCD) is materials used for forming substrates. Both of a cover and a backplane are made of glass in a TFT-LCD, nevertheless, the cover in a LCoS display is made of glass, but the backplane in a LCoS display is a semiconductor silicon substrate. Therefore, a LCoS process combines LCD techniques and complementary metal-oxide semiconductor (CMOS) processes. Micro-display technologies nowadays can roughly be divided into two types: transmissive and reflective.
In LCD devices, the thickness of the liquid crystal layer, or the cell gap (i.e., the spacing between a transparent conducting substrate and a semiconductor substrate) has to be precisely controlled to a specific value so as to ensure the performance of the display. In order to maintain the cell gap, in conventionally-employed liquid crystal display devices, plastic beads, glass beads or glass fibers are normally interposed between two liquid crystal display substrates and used as spacers. Thus, this cell gap is defined by the spacer height. In a conventional LCD process, the spacers are positioned by spraying, so the positions between the two liquid crystal display substrates cannot be controlled accurately. Consequently, the display performance of the liquid crystal display device is affected due to light scattering by the spacers that are present in the light transmitting regions. Furthermore, the spacers tend to be poorly distributed so that the display performance in portions of the LCD with spacers bunched is impaired, and the uniformity of the cell gap cannot be precisely maintained. Moreover, the quality of the displays in the same batch or in different batches is different, leading to a reduced yield rate and an increased manufacturing cost.
In addition, size and cost restraints for micro-displays normally require the drive circuit of an integrated circuit to be integrated into the backplane along with the pixel transistors. In other words, the drive circuit is fabricated on the display substrate, rather than designed as a large external drive circuit of the conventional LCD devices. In the conventional technique, process of forming the drive circuit is implemented after positioning the spacers. Then, the electrode of the upper transparent conducting substrate is soldered to the internal circuit board during the backend assembly process.
Since the bead-spacers are sprayed on the LCD substrate in the conventional method, the locations of the spacers are unfixed and thus with irregular distribution that frequently leads to defects of the LCD devices. Therefore, methods for not only evenly spreading the spacers on the LCD substrate but also obtaining LCD devices with stable display performance are needed. Additionally, integrating mature CMOS processes with the LCDtechnology can effectively increase the production yield and reduce the production cost.
SUMMARY OF INVENTION
It is therefore a primary objective of the present invention to provide a method of fabricating a Liquid Crystal-on-Silicon backplane to solve the above-mentioned problem.
According to the claimed invention, a reflective mirror layer is formed on a silicon substrate and is then selectively etched to define a crossover pad region, a pixel array region, and a bonding pad region on the silicon substrate. The crossover pad region further comprises a bottom pad made from the reflective mirror layer, the pixel array region further comprises a plurality of reflection units made from the reflective mirror layer and a plurality of trenches formed between the reflection units, and the bonding pad region further comprises at least one bonding pad made from the reflective mirror layer. Then the trenches are filled with a gap-filling material, and a dielectric layer is deposited over the crossover pad region, the pixel array region and the bonding pad region. Thereafter, a first photoresist layer, comprising a plurality of openings for defining a crossover pad via pattern within the crossover pad region, is formed on the dielectric layer, and an etching process is performed to etch away exposed portions of the dielectric layer through the plurality of openings to form a plurality of crossover pad vias within the crossover pad region. The first photoresist layer is stripped then, and the crossover pad vias are filled with conductive material to form a plurality of plugs in the plurality of vias. A top pad electrically coupled to the bottom pad via the plugs is formed on the crossover pad region thereafter. Finally, a second photoresist layer is formed on the silicon substrate to mask the crossover pad region and to define a spacer pattern on the dielectric layer within the pixel array region, and then the dielectric layer is etched to form a plurality of spacers within the pixel array region.
It is an advantage of the present invention method that the post-spacers with fixed locations and a fixed height are formed by photolithography and etching processes, so that problems encountered in the prior art such as the irregular distribution of the bead-spacers are effectively prevented during the fabrication of LCoS micro-displays with the precisely-controlled cell gap. In addition, since the post-spacers and crossover pads, providing an internal circuit in a LCoS backplane, are fabricated together according to, subsequent processes for soldering the electrode of the upper transparent conducting substrate onto the internal circuit board are omitted. Consequently, the yield rate is increased and the production cost is reduced both due to the improved manufacturing processes.


REFERENCES:
patent: 4653864 (1987-03-01), Baron et al.
patent: 6008876 (1999-12-01), Moore
patent: 6153927 (2000-11-01), Raj et al.
patent: 6307612 (2001-10-01), Smith et al.
patent: 6381061 (2002-04-01), Levolta

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