Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Reexamination Certificate
2000-12-26
2003-02-25
Coleman, William David (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Multiple housings
C257S700000
Reexamination Certificate
active
06525415
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a three-dimensional semiconductor integrated circuit apparatus and a manufacturing method therefor.
2. Description of the Related Art
In recent years, attempts have been made to develop three-dimensional semiconductor integrated circuit apparatuses by integrating plural circuit functional blocks three-dimensionally with a view to producing semiconductor integrated circuit apparatuses on a larger scale of integration and in higher density. At first, the possibility of manufacturing three-dimensional semiconductor integrated circuit apparatuses by monolithic technology utilizing “silicon on insulator” (SOI) techniques through laser recrystallization and otherwise to repeat SOI substrate formation and the formation of semiconductor apparatuses over the SOI substrates so prepared. However, stacking many SOI layers involves the problems of the difficulty to secure a satisfactory level of crystallinity and a long manufacturing time.
For this reason, many ways to manufacture three-dimensional semiconductor integrated circuit apparatuses are under study, such as bonding together monocrystalline semiconductor substrates over which semiconductor integrated circuit apparatus are fabricated in advance.
In an article by Yoshihiro Hayashi et al. in the September 1990 issue of the monthly
Semiconductor World
, pp. 58-64 (in Japanese), as a bonding technique, a CUBIC method is proposed by which semiconductor substrates ground into thin films are bonded together. According to the CUBIC technique, after a first semiconductor substrate having a semiconductor element formed over a silicon substrate is bonded to a supporting substrate, superfluous parts of the silicon substrate are polished off to obtain a thin film. Then, wiring lines needed for the connection of devices including contact members, such as embedded wiring, back side wiring and bump/pools, and the first semiconductor substrate and a second semiconductor substrate having a semiconductor element formed over a silicon substrate are bonded together. Finally, the supporting substrate is removed to finish the intended semiconductor of a multi-layered structure.
Another instance is a three-dimensional semiconductor integrated circuit apparatus formed by a bonding technique, disclosed in the Japanese Published Unexamined Patent Application No. Hei 6-260594. This process begins with similar steps to those of the CUBIC technique, i.e. a first semiconductor substrate having a semiconductor element formed over a silicon substrate is bonded to a supporting substrate, and superfluous parts of the silicon substrate are polished off to obtain a thin film, but it is different in that a trench for embedded wiring is provided in the first semiconductor substrate in advance and that the first semiconductor substrate and a second semiconductor substrate having a semiconductor element formed over a silicon substrate are bonded together, followed by removal of the supporting substrate and formation of embedded wiring.
However, both of these manufacturing processes involve the steps of bonding the first semiconductor substrate to the supporting substrate and to remove the supporting substrate after polishing, resulting in troublesome complexity.
The CUBIC technique involves its own problem that, because the supporting substrate is removed after superfluous parts of the silicon substrate are polished off to obtain a thin film, the integrated circuit formed over the semiconductor substrate is apt to be damaged when the supporting substrate is removed.
Furthermore, the technique disclosed in Japanese Published Unexamined Patent Application No. Hei 6-260594 is subject to a problem that, since the first semiconductor substrate in which a trench for embedded wiring is provided in advance is bonded to the supporting substrate, the adhesive having found its way deep into the trench is difficult to remove and another problem that, because an insulating film is formed by oxidizing the side walls of the trench after the first semiconductor substrate and the second semiconductor substrate are bonded together, the oxidization temperature cannot be raised beyond a level that the adhesive can withstand, making it impossible to form a reliable insulating film.
SUMMARY OF THE INVENTION
Therefore, the present invention is intended to provide a three-dimensional semiconductor integrated circuit apparatus which permits ready electrical connection and is highly resistant to deformation. The invention is also intended to provide a manufacturing method for three-dimensional semiconductor integrated circuit apparatuses, which requires no step to mount or dismount a supporting substrate, thereby simplifying the manufacturing process substantially, and permits stacking of multi-layered semiconductor substrates in a simple and easy process and formation of embedded wiring surrounded by a reliable insulating layer.
In order to realize these intentions, according to a first aspect of the invention, there is provided a three-dimensional semiconductor integrated circuit apparatus having a first semiconductor substrate over whose surface layer is formed a first integrated circuit; a second semiconductor substrate over whose surface layer are formed a second integrated circuit and embedded wiring of which one end is electrically connected to the second integrated circuit and the other end is exposed from the back side, and whose integrated circuit side is bonded to the integrated circuit side of the first integrated circuit so that the first integrated circuit and the second integrated circuit be electrically connected; and a third semiconductor substrate over whose surface layer is formed a third integrated circuit and whose integrated circuit side is bonded to the back side of the second integrated circuit so that the third integrated circuit be electrically connected to the other end of the embedded wiring.
This three-dimensional semiconductor integrated circuit apparatus according to the first aspect of the invention, since its first semiconductor substrate and second semiconductor substrate are bonded together with their respective integrated circuit sides positioned opposite to each other, permits ready electrical connection, and its good symmetry effectively prevents the substrates from deformation such as warping. Moreover, as the embedded wiring penetrates the substrate, the substrate can be made reasonably thick.
According to a second aspect of the invention, there is provided a three-dimensional semiconductor integrated circuit apparatus having a first semiconductor substrate over whose surface layer is formed a first integrated circuit; a second semiconductor substrate over whose surface layer are formed a second integrated circuit and embedded wiring of which one end is electrically connected to the second integrated circuit and the other end is exposed from the back side, and whose integrated circuit side is bonded to the integrated circuit side of the first integrated circuit so that the first integrated circuit and the second integrated circuit be electrically connected; and a third semiconductor substrate over whose surface layer are formed a third integrated circuit and embedded wiring of which one end is electrically connected to the third integrated circuit and the other end is exposed from the back side, and whose integrated circuit side is bonded to the back side of the second integrated circuit so that the third integrated circuit be electrically connected to the other end of the embedded wiring of the second semiconductor substrate.
This three-dimensional semiconductor integrated circuit apparatus according to the second aspect of the invention, as embedded wiring is formed in the third semiconductor substrate, makes it possible to manufacture a four-layered three-dimensional semiconductor integrated circuit apparatus by further grinding the back side of the third semiconductor substrate to expose the embedded wiring and by bonding a fourth semiconductor substrate to the back
Koyanagi Mitsumasa
Miyakawa Nobuaki
Okano Yasunori
Coleman William David
Fuji 'Xerox Co., Ltd.
Oliff & Berridg,e PLC
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