Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Charge transfer device
Reexamination Certificate
2000-10-31
2003-12-23
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Charge transfer device
C257S048000, C257S215000
Reexamination Certificate
active
06667499
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to an on-chip microlens for a solid-state image sensing device and, more particularly, to a solid-state image sensing device which allows checking whether the film thickness of a planarizing film for the microlens of an image sensing section is formed as designed, and a method of manufacturing the same.
Development of solid-state image sensing devices is now in full flourish for image input cameras of personal computers video cameras as well as for video cameras. As the solid-state image sensing devices become popular, the required performance is advanced, and an increase in number of pixels and downsizing are essential subjects in development. For example, for digital still cameras that are becoming popular in recent years, the number of pixels increases from 330,000 pixels (640 dots×480 dots) to 1,300,000 pixels (1,280 dots×1,024 dots). Recently, digital still cameras with 2,000,000 pixels are available. As for downsizing in 330,000-pixel cameras, the mainstream is changing from ⅓-inch format (5.5 mm in diagonal size) to ¼-inch format (4 mm in diagonal size).
With such an increase in number of pixels and downsizing of solid-state image sensing devices, reduction of pixel size is inevitable. In the above-described 330,000-pixel cameras, the pixel size is about 6.8 &mgr;m per side of a pixel in the ⅓-inch format, while it is 5.0 &mgr;m per side of a pixel in the ¼-inch format. When the pixel size is reduced, the amount of incident light decreases, resulting in deterioration in sensitivity. More specifically, the S/N (Signal-to-Noise) ratio lowers, and the image quality becomes poor. Hence, how to maintain the sensitivity high even with a reduced pixel size is a problem. To solve this problem, conventionally, an on-chip microlens is formed on a photodiode.
Before an explanation of an on-chip microlens, a conventional interline CCD (Charge Coupled Device) image sensing device will be described.
FIG. 4
shows a general interline CCD image sensing device. The CCD image sensing device comprises a rectangular image sensing region
51
, a horizontal CCD
52
extending in the row direction on the lower side of the image sensing region
51
, and an output section (charge detection section)
53
connected to one end of the horizontal CCD
52
. In the image sensing region
51
, a plurality of photodiodes
54
for photoelectrically converting light into signal charges and storing the charges are arranged in a two-dimensional matrix. A vertical CCD
55
for transferring signal charges is arranged adjacent to each photodiode array while extending in the column direction. A read region
56
is formed between each photodiode
54
and a corresponding vertical CCD
55
to read signal charges from the photodiode
54
to the vertical CCD
55
. The region other than the above components in the image sensing region
51
is an element isolation region
57
. The portion other than the image sensing region
51
, horizontal CCD
52
, and output section
53
is a field region
58
.
In such a CCD image sensing device, a p-type well
2
is formed on an n-type substrate
1
constructing the image sensing section, as shown in FIG.
5
A. In the p-type well
2
, an n-type photodiode layer
3
for storing signal charges generated upon photoelectric conversion, an n-type vertical CCD buried layer
4
for vertically transferring the charges, a read region
56
for reading the charges from the n-type photodiode layer
3
to the vertical CCD buried layer
4
, and a heavily-doped p-type impurity layer
6
serving as an element isolation region are formed. The heavily-doped p-type impurity layer
6
is formed in the element isolation region between the photodiode layer
3
and the vertical CCD buried layer
4
and on the surface of the photodiode layer
3
. A p-type vertical CCD well layer
5
is formed under the vertical CCD buried layer
4
. A vertical CCD transfer electrode
16
is formed on the vertical CCD buried layer
4
via an insulating film
15
. A light-shielding film
17
having an opening
18
above the photodiode layer
3
is formed on the insulating film
15
which is formed on the entire surface of the semiconductor substrate including the vertical CCD buried layer
4
and heavily-doped p-type impurity layer
6
.
A planarizing film
20
is formed on the insulating film
15
and light-shielding film
17
. A microlens
19
is formed on the planarizing film
20
in correspondence with the opening
18
. The microlens
19
optically acts as a convex lens to condense incident light
21
onto the photodiode layer
3
through the opening
18
, thereby improving the photosensitivity. Referring to
FIG. 5A
, the planarizing film
20
is illustrated as if it were formed from a uniform material.
For a color image sensing device, a predetermined color layer
22
is formed in the planarizing film
20
in units of pixels, as shown in FIG.
5
B. The color layer
22
extracts a color of light incident on the photodiode layer
3
constituting a pixel. That is, the planarizing film
20
is not always formed from a uniform material and may include, e.g., a color layer of a color filter or an internal lens with a refractive index different from that of the planarizing film. Note that a layer between the surface of the opening
18
and the bottom surface of the microlens
19
, which is optically transparent or passes a specific color and includes the color layer
22
, is sometimes simply called a planarizing film
20
.
A method of manufacturing the conventional image sensing device will be described next with reference to
FIGS. 6A
to
6
E. First, as shown in
FIG. 6A
, with a general semiconductor manufacturing process, the above-described p-type well
2
, n-type photodiode layer
3
, n-type vertical CCD buried layer
4
, p-type vertical CCD well layer
5
, and heavily-doped p-type impurity layer
6
are formed on the surface of the n-type semiconductor substrate
1
constituting the image sensing section, and then, the insulating film
15
is formed on the entire substrate surface. Next, as shown in
FIG. 6B
, the vertical CCD transfer electrode
16
, insulating film
15
, light-shielding film
17
, and opening
18
are sequentially formed on the insulating film
15
, thus completing the underlying structure of the image sensing device. The structure shown in
FIG. 6B
will be referred to as an underlying structure or underlying pattern.
An on-chip microlens is formed next. Referring to
FIG. 6C
, the planarizing film
20
made of an acrylic resin is formed (coated) on the underlying structure of the image sensing device formed in the semiconductor manufacturing process. For a single-CCD color image sensing device, the predetermined color layer
22
is inserted into the planarizing film
20
in units of pixels. As the color layer
22
, a color layer formed from a pigment material or a color layer formed from a dye material is used. For an image sensing device other than a single-CCD color device, the color layer
22
may be absent. To keep the planarity after formation of the color layer
22
, planarizing films may be repeatedly formed (coated) a plurality of number of times.
After that, as shown in
FIG. 6D
, a resin pattern
9
is formed on the planarizing film
20
in correspondence with the opening
18
as a microlens formation region by patterning a resin made of an acrylic material using lithography. Next, as shown in
FIG. 6E
, the resin pattern
9
is worked into a convex lens shape having a predetermined curvature using thermal reflow, thereby forming the microlens
19
. Thus, the image sensing device is completed.
The microlens
19
must have a shape that wholly condenses the incident light
21
to the opening
18
for its purpose. Hence, in forming the microlens
19
, the film thickness of the planarizing film
20
and the height and width (diameter) of the microlens
19
are appropriately determined in advance by optical simulations or the like. Additionally, in the manufacturing process, for the film thicknes
Flynn Nathan J.
NEC Electronics Corporation
Quinto Kevin
Sughrue & Mion, PLLC
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