Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For plural devices
Reexamination Certificate
2002-07-08
2003-06-10
Potter, Roy (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
For plural devices
C257S777000
Reexamination Certificate
active
06576997
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
The present invention generally relates to a semiconductor device and a method for fabricating the same. More particularly, the present invention relates to a MCP (Multi Chip Package) type of semiconductor device, which includes a plurality of semiconductor chips therein.
BACKGROUND OF THE INVENTION
Recently, for improving the integration of semiconductor ICs, MCP (Multi Chip Package) technology has been used. A conventional semiconductor device is made up of a substrate, a first semiconductor chip mounted on the substrate and a second semiconductor chip provided on the first semiconductor chip. Those semiconductor chips are resin-molded to form a semiconductor package. The complete semiconductor package is mounted on a mother board using, for example, BGA (Ball Grid Array) technique.
The first and second semiconductor chips are provided with aluminum electrodes thereon, while the substrate is provided with bonding posts. The aluminum electrodes of the semiconductor chips and bonding posts on the substrate are wire-bonded to make electrical connection.
The second semiconductor chip must be small enough in order to form the areas for the aluminum electrodes on the first semiconductor chip. If the second semiconductor chip is too small as compared to the first semiconductor chip, the metal wires must be long and therefore it is difficult to keep the metal wires in good shape. On the other hand, if the second semiconductor chip is not small enough, a short circuit may be made between the first and second semiconductor chips. Therefore, it is required that the semiconductor chips are designed in shape with many restrictions. At the same time, it has been required to design semiconductor devices (IC packages) to be thinner.
In addition, according to the conventional semiconductor device, when the first and second semiconductor chips are operating at the same time, signals are interfered to each other between the first and second semiconductor chips. As a result, the semiconductor device may not operate properly.
OBJECTS OF THE INVENTION
Accordingly, an object of the present invention is to provide a semiconductor device in which no signal interference is made between semiconductor chips.
Another object of the present invention is to provide a semiconductor device in which semiconductor chips can be designed without many restrictions in shape.
Still another object of the present invention is to provide a semiconductor device that can be designed to be small in size or thinner.
Additional objects, advantages and novel features of the present invention will be set forth in part in the description that follows, and in part will become apparent to those skilled in the art upon examination of the following or may be learned by practice of the invention. The objects and advantages of the invention may be realized and attained by means of the instrumentalities and combinations particularly pointed out in the appended claims.
SUMMARY OF THE INVENTION
According to a generic aspect of the present invention, a semiconductor device is made up of a substrate (
101
,
201
,
301
,
401
,
501
,
601
or
701
); a first semiconductor chip (
102
,
202
,
302
,
402
,
502
,
602
or
702
) mounted on the substrate; a first insulating layer (
105
,
205
,
305
,
405
,
505
,
605
or
705
) which is provided on the first semiconductor chip; a metal layer (
102
,
202
,
302
,
402
,
502
,
602
or
702
) which is provided on the first insulating layer; a second insulating layer (
117
,
217
,
317
,
417
,
517
,
617
or
717
) which is provided on the metal layer; and a second semiconductor chip (
104
,
204
,
304
,
404
,
504
,
604
or
704
) which is provided on the second insulating layer.
In the above described semiconductor device, the metal layer electro-magnetically interrupts or reduce an interruption of signals, which are generated between the first and second semiconductor chips. As a result, the semiconductor device operates properly and the quality and reliability is improved.
According to a first specific aspect of the present invention, a semiconductor device is made up of a substrate (
101
); a first insulating layer (
103
) which is provided on the substrate; a first semiconductor chip (
102
) which is provided on the first insulating layer; a second insulating layer (
105
) which is provided on the first semiconductor chip; a metal layer (
112
) which is provided on the second insulating layer; a third insulating layer (
117
) which is provided on the metal layer; and a second semiconductor chip (
104
) which is provided on the third insulating layer.
According to a second specific aspect of the present invention, a semiconductor device includes a substrate (
301
,
401
,
501
,
601
or
701
) which is shaped to have a cavity (
322
,
422
,
522
,
622
or
722
); a first semiconductor chip (
302
,
402
,
502
,
602
or
702
) which is mounted in the cavity of the substrate; a first insulating layer (
305
,
405
,
505
,
605
or
705
) which is provided on the first semiconductor chip; a metal layer (
312
,
412
,
512
,
612
or
712
) which is provided on the first insulating layer; a second insulating layer (
317
,
417
,
517
,
617
or
717
) which is provided on the metal layer; and a second semiconductor chip (
304
,
404
,
504
,
604
or
704
) which is provided on the second insulating layer.
In the above described semiconductor device, the first semiconductor chip is mounted in the cavity of the substrate, so that the semiconductor device can be fabricated to be thinner. Further, the first semiconductor chip may be mounted by surface bonding and wire bonding is only performed between the second semiconductor chip and the substrate. Therefore, a short circuit is not easily made between the first and second semiconductor chips.
REFERENCES:
patent: 6025651 (2000-02-01), Nam
patent: 6265763 (2001-07-01), Jao et al.
Oki Electric Industry Co, Ltd.
Potter Roy
Rabin & Berdo P.C.
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