Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2001-08-30
2003-11-25
Lao, Lun-Yi (Department: 2673)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S067000, C345S208000, C315S169400
Reexamination Certificate
active
06653995
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a plasma display device comprising a plasma display panel (hereinafter abbreviated to “PDP”) and a control method of applying voltage on the plasma display device.
A plasma display device comprising a PDP has recently been developed as a low-profile large screen color display device.
An AC planar plasma display panel with three electrodes shown in
FIG. 10
is widely developed at present. In the AC planar plasma display panel with three-electrodes, a pair of glass substrates, i.e., a front panel
1001
and a back panel
1008
are provided to be opposed to each other with forming a discharge region
1013
therebetween. The discharge region
1013
is filled with a mixture gas, that is used as a discharge gas, composed of He, Ne, Xe, Ar and the like at a pressure not less than several hundreds of Torrs. At the bottom surface of the front panel
1001
provided at the side of a display surface, there is formed a pair of sustain discharge electrodes comprising X electrodes and Y electrodes placed in parallel to each other. A voltage is applied repeatedly to the pair of sustain discharge electrodes to cause a continuous emission. Generally, the X electrodes and the Y electrodes respectively are composed of transparent electrodes and opaque electrodes for supplementing a conductivity of the transparent electrodes. In other words, the X electrodes are composed of transparent X electrodes such as
1002
-
1
and
1002
-
2
and opaque bus X electrodes such as
1004
-
1
and
1004
-
2
, while the Y electrodes comprises transparent Y electrodes such as
1003
-
1
and
1003
-
2
and opaque bus Y electrodes such as
1005
-
1
and
1005
-
2
.
Each of the sustain discharge electrodes is coated with a front dielectric layer
1006
, and a thin protection layer
1007
of magnesium oxide (MgO) or the like is formed on the front dielectric layer. MgO is high in secondary electron emission and serves to intensify a discharge at a collision with ions such as He, Ne, Xe and Ar that are generated by the discharge, thereby lowering a starting voltage. Further, MgO is excellent in sputtering resistance and, therefore, serves to protect the front dielectric layer
1006
from damages otherwise caused by a direct collision of the ions such as He, Ne, Xe and Ar generated by the discharge with the front dielectric layer
1006
.
In turn, on upper surface of the back panel
1008
, there are provided electrodes to write data for address discharge, or, address electrodes (hereinafter simply referred to as “A electrodes”)
1009
in an orthogonal direction with respect to the sustain discharge electrodes. Each of the A electrodes
1009
is coated with a back dielectric layer
1010
, and ribs
1011
are provided on the back dielectric layer
1010
in such a manner as to sandwich the A electrodes
1009
. Phosphors
1012
are applied on concaved regions, respectively, each of which is formed by wall surfaces of the ribs
1011
and an upper surface of the back dielectric layer
1010
.
In above configuration, an intersection of the pair of sustain discharge electrodes and the A electrodes corresponds to a discharge cell region, and discharge cells are arranged in a matrix of about 1000×10000 in two dimensions. In the case of a color display, a pixel is composed of a three kinds of discharge cells respectively coated with red, green and blue phosphors.
An operation of a PDP will be described below.
A principle of emission of a PDP is such that a plasma comprising electrons and ions is generated from a discharge gas by means of a voltage applied to X and Y electrodes, and the electrons cause the discharge gas in a ground state to be in an excitation state, followed by converting ultraviolet rays generated from the discharge gas in the excitation state into visible rays by means of phosphors.
As shown in a block diagram of
FIG. 11
, the PDP
1100
is incorporated into the plasma display device
1102
. A signal generator of pictures
1103
sends a signal indicating a display screen to a driving circuit
1101
. The driving circuit
1101
receives and converts the signal into a voltage to be supplied to each of electrodes of the PDP
1100
.
FIG.
12
(A) explains a time chart of a voltage applied during a TV field period that is required for displaying an image on the PDP shown in FIG.
11
. As shown in (I) in FIG.
12
(A), a single TV field period
1200
is divided into subfields
1201
to
1208
that are different in a number of sustain voltage pulse application. Gradation is represented by adjusting the number of sustain voltage pulse application of each of the subfields, i.e., an intensity of emission caused by the sustain discharge. In the case of using 8 subfields each having a weight corresponding to an intensity of emission based on a binary scale, a discharge cell for tricolor display is capable of 2
8
(=256) gradations of brightness display, thereby making it possible to display about 16780000 colors. Each of the subfields has a period of reset discharge
1209
for restoring the discharge cell into an initial state, a period of address discharge
1210
for selecting an illuminated discharge cell and a period of sustain discharge
1211
for performing an emission display as shown in (II) of FIG.
12
(A).
FIG.
12
(B) shows applied voltage waveforms to be applied to the A, X and Y electrodes during the address discharge period
1210
. The waveform
1212
is a voltage waveform applied to one of the A electrodes
1009
during the address discharge period
1210
;
1213
and
1214
are voltage waveforms applied to i-th electrode and (i+1)th electrode of the Y electrodes; and the waveform
1217
is a voltage waveform applied to one of the X electrodes. Here, the applied voltages are respectively, V
0
, V
21
, V
21
and V
1
(V).
As shown in FIG.
12
(B), in the case where a scan pulse
1215
is applied to i-th line of the Y electrodes, a discharge occurs between the Y electrodes and the A electrodes in a cell positioned at an intersection of the i-th line of the Y electrodes and the A electrodes
1009
of the voltage V
0
, and the discharge transfers from the Y electrodes to X electrodes to generate an address discharge. Such address discharge does not occur in a cell positioned at an intersection of the i-th line of the Y electrodes and the A electrodes
1009
to which the voltage V
0
is not applied. The same applies to the case where a scan pulse
1216
is applied to the (i+1)th line of the Y electrodes. The cell at which the address discharge occurred, an electric charge generated by the discharge is formed as a wall charge on surfaces of the dielectric layer and the protection layer
1007
covering the X and Y electrodes, and a wall voltage Vw (V) occurs between the X electrodes and the Y electrodes. Presence or absence of a sustain discharge during the subsequent sustain discharge period
1211
hinges upon the presence or absence of the wall voltage.
FIG.
13
(A) shows voltages waveforms applied simultaneously during the sustain discharge period
1211
of FIG.
12
(A) between the X electrodes and the Y electrodes that are sustain discharge electrodes. An applied voltage waveform
1301
that is a voltage having a rectangular waveform is applied repeatedly to the Y electrodes and an applied voltage waveform
1302
that is a voltage having a rectangular waveform is applied repeatedly to the X electrodes. Each of the rectangular waveform serves to increase the voltage from 0 V to Vsus (V) in a rise period of a time 0<T<Tr (s) when a time of a head of the waveform is 0. During a time Tr<T<Tr+Tsus (s), the voltage Vsus (V) is maintained. During a time Tr+Tsus<T<Tr+Tf+Tsus (s), the voltage Vsus (V) is lowered to 0V. During a time Tr+Tf+Tsus<T<Tr+Tf+Tsus+Tg (s), the voltage 0V is maintained.
In turn, in the A electrodes, a constant voltage Va (V) of an applied voltage waveform
1303
is applied from a time 0. The period of the time 0<T<Tr+Tf+Tsus+Tg (s)
Ho Shirun
Suzuki Keizo
Uemura Norihiro
Yamamoto Ken-ichi
Hitachi , Ltd.
Lao Lun-Yi
Mattingly Stanger & Malur, P.C.
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