Information handling system with self-calibrating...

Coded data generation or conversion – Converter calibration or testing

Reexamination Certificate

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Details

C341S131000, C341S144000, C341S155000, C345S098000, C345S099000

Reexamination Certificate

active

06664907

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a digital-to-analog converter arrangement. In particular, the present invention relates to digital-to-analog converters in information handling systems, for example, in a graphics controller unit for providing an RGB signal.
BACKGROUND OF THE INVENTION
As the value and use of information continues to increase, individuals and businesses seek additional ways to process and store information. One option available to users is an information handling system. An information handling system generally processes, compiles, stores, and/or communicates information or data for business, personal, or other purposes thereby allowing users to take advantage of the value of the information. Because technology and information handling needs and requirements vary between different users or applications, information handling systems may also vary regarding what information is handled, how the information is handled, how much information is processed, stored, or communicated, and how quickly and efficiently the information may be processed, stored, or communicated. The variations in information handling systems allow for information handling systems to be general or configured for a specific user or specific use such as financial transaction processing, airline reservations, enterprise data storage, or global communications. In addition, information handling systems may include a variety of hardware and software components that may be configured to process, store, and communicate information and may include one or more computer systems, data storage systems, and networking systems.
Information handling systems, such as a modular computer system, include usually a graphics card which can be inserted in a slot of an expansion system of the computer. Other systems, such as all-in-one systems, may include a graphics controller unit integrated within the system architecture. In any case, graphics controllers use a plurality of digital-to-analog converters for generating a video signal, such as an RGB signal necessary to produce an image on the screen of a monitor. For an RGB signal usually three digital-to-analog converters are necessary to provide separate signals for RED, GREEN, and BLUE. In critical applications, such as image processing, color accuracy is very important. For example, the white-level is one of the important critical parameters. To generate the “color” white on a monitor, all three primary color signals RED, GREEN, and BLUE are set to their maximum value. In particular, certain standards, such as the VESA VSIS specification, require that the white-level difference between the RED, GREEN, and BLUE Digital-to-Analog converter (DAC) outputs be nominally no greater than 42 mV. Therefore, DAC outputs can differ from each other as much as 42 mV (for a nominal white level) and still meet the specification requirement.
However, for color critical applications, the human eye can visually detect a much smaller difference in a DAC output. In fact, each least significant bit (LSB) of a DAC voltage output is only approximately 2.7 mV for an 8-bit DAC. Outputs that are different by the permissible 42 mV would then be different by approximately 15 LSB, which would include 4 bits out of the 8-bit color band field. The human eye, however, can detect a difference as small as 2 or 3 LSBs. Therefore, differences between the output accuracy of the DACs can highly affect the accuracy of the colors presented on a monitor. Other factors aggravate the above described problems; the on chip tracking between the three DACs can be different; the 75 Ohm termination resistors in the graphics card and on the display side of the cable can have a tolerance limitations and other components, such as necessary filters, can further affect the DAC output voltage.
SUMMARY OF THE INVENTION
Therefore, a need for an improved DAC arrangement with the capability of avoiding inaccuracy of multiple DACs exists.
A first embodiment of the present invention is a self-calibrating video circuit comprising a first and second digital-to-analog converter generating first and second output signals, and a calibration circuit coupled with the first and second digital-to-analog converters for calibrating the first digital-to-analog converter output signal to the output signal of the second digital-to-analog converter.
A second embodiment is an information handling system with a self-calibrating video circuit.
The calibration circuit can comprise a comparator for comparing the level of the first and second output signal and generating a calibration signal fed to the first digital-to-analog converter. Furthermore, the circuit can comprise an analog-to-digital converter receiving the calibration signal and a calibration unit coupled with the output of the analog-to-digital converter and the first digital-to-analog converter. The calibration unit may also comprise a register for storing the output signal of the analog-to-digital converter. Yet another digital-to-analog converter coupled with the register and an offset generator coupled with the another digital-to-analog converter for generating an offset signal fed to the first digital-to-analog converter may be provided. The offset generator can comprise an operational amplifier. The comparator can comprise a first and second comparator for generating a positive or negative difference signal. Furthermore, associated first and second analog-to-digital converters coupled with associated first and second registers for storing a positive or negative calibration value can be provided. Also, the circuit may comprise associated third and fourth digital-to-analog converters each having an input coupled with the first and second registers, respectively and an operational amplifier for generating a calibration signal fed to the first digital-to-analog converter wherein the third and fourth digital-to-analog converters each comprise an output coupled with a first and second input of the operational amplifier, respectively. The operational amplifier can have an offset input. The circuit can further comprise an additional digital-to-analog converter generating an additional output signal and a second calibration circuit coupled with the additional and the second digital-to-analog converters for calibrating the additional digital-to-analog converter output signal to the output signal of the second digital-to-analog converter.
A method of operating an information handling system having a self-calibrating video circuit with a first and second digital-to-analog converter generating a first and second output signal, according to the present invention comprises the steps of:
applying a digital white signal to the first and second digital-to-analog converter;
determining the difference between a first and a second output signal; and
calibrating the first digital-to-analog converter to match the output signal of the second digital-to-analog converter.
The step applying a digital white signal may include the transfer of logical “1” input signals to the digital-to-analog converters. A step of storing the difference in a register may be provided. The steps can be performed after a reset of the information handling system. The step of storing the difference can be performed after a predetermined settling time. Furthermore, the steps according to the method can be performed after a manual trigger signal.


REFERENCES:
patent: 5001480 (1991-03-01), Ferry et al.
patent: 5604510 (1997-02-01), Blanchard
patent: 6008801 (1999-12-01), Jeong
patent: 6049321 (2000-04-01), Sasaki
patent: 6452526 (2002-09-01), Sagawa et al.

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