MOS transconductance amplifier having squaring circuit for LSI i

Details MOS transconductance amplifier having squaring circuit for LSI i MOS transconductance amplifier having squaring circuit for LSI i

1995-03-10

1996-01-16

Mottola, Steven J.

Amplifiers

With semiconductor amplifying device

Including differential amplifier

327349, 330257, H03F 345

Patent

active

054851190

ABSTRACT:
In a MOS operational transconductance amplifier including a MOS transistor differential pair, first to fourth current mirrors are provided between a voltage supply and a reference potential. The second and fourth current mirrors are connected together to a common node to which the channels of MOS transistor differential pair are connected. A first MOS transistor is connected between the voltage supply and a first constant current sink, and a second MOS transistor is connected at one end to the first current mirror and at the other end to the first constant current sink and the second current mirror. A third MOS transistor is connected at one end to the third current mirror and at the other end to the second constant current sink and the fourth current mirror, and a fourth MOS transistor is connected between the voltage supply and the second constant current sink. An input voltage is applied across the gates of the MOS differential pair as well as across first and second terminals to which the gates of the first and third MOS transistors and the gates of the second and fourth MOS transistors are connected. The first and second current mirrors and the second MOS transistor form a bootstrapping loop so that the second current mirror produces at the node a current equal to a sum of a constant current produced by the first constant current sink and a current equal to the drain current of one of the first and second MOS transistors. The third and fourth current mirrors and the third MOS transistor form another bootstrapping loop so that the fourth current mirror produces at the node a current equal to a sum of a constant current produced by the second constant current sink and a current equal to the drain current of one of the third and fourth MOS transistors.

REFERENCES:
patent: 5107150 (1992-04-01), Kimura
patent: 5381113 (1995-01-01), Kimura
A. Nedungadi ete al, "Design of Linear CMOS Transconductance Elements", IEEE Transaction on Circuits and Systems, vol. CAS-31, No. 10, Oct. 1984, pp. 891-894.

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