Phase change material electronic memory structure and method...

Details Phase change material electronic memory structure and method... Phase change material electronic memory structure and method...

2002-05-10

2003-08-12

Flynn, Nathan J. (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Bulk effect device

Bulk effect switching in amorphous material

C257S001000, C257S003000, C257S004000, C439S909000

Reexamination Certificate

active

06605821

ABSTRACT:

FIELD OF THE INVENTION
The invention relates generally to random access memory (RAM). More particularly, the invention relates to a phase change material electronic memory structure, and a method for forming the phase change material electronic memory structure.
BACKGROUND OF THE INVENTION
RAM can be used in computer systems. Generally, RAM can perform read and write operations much faster than conventional long-term storage such as hard drives. In addition, RAM is generally more compact and generally consumes less power than hard drives.
RAM devices generally include an array of memory cells. The memory cells are typically configured in rows and columns. Each row generally includes a corresponding word line, and each column generally includes a corresponding bit line.
FIG. 1
shows an RAM array of memory cells
110
,
120
,
130
,
140
, and corresponding word lines (WL) and bit lines (BL). The RAM memory cells
110
,
120
,
130
,
140
are located at cross-points of the word lines and the bit lines, and each RAM memory cells
110
,
120
,
130
,
140
generally stores a bit of information.
The RAM memory cells
110
,
120
,
130
,
140
include functionality for setting the RAM memory cells
110
,
120
,
130
,
140
to one of at least two logical states. Each logical state represents a bit of information. Additionally, the RAM memory cells
110
,
120
,
130
,
140
include functionality for sensing the logical state of each of the RAM memory cells
110
,
120
,
130
,
140
.
A particular RAM memory cell structure includes a phase change material. Phase change material memory cells generally include data being stored by setting the phase change material to one of two physical states of the phase change material. For example, a first physical state of the phase change material can include a high electrical resistance state, and a second physical state of the phase change material can include a low electrical resistance state. The first physical state can represent a binary zero, and the second physical state can represent a binary one.
A particular phase change material RAM memory cell can include the first physical state being an amorphous state that includes a high electrical resistance. The phase change material RAM memory cell can further include the second physical state being a crystalline state that includes a low electrical resistance. The electrical resistance of the phase change material RAM memory cell can be determined (that is, read) by sensing the resistance of the phase change material memory cell. The electrical resistance can be sensed by applying a voltage or current across the phase change material memory cell, and sensing a resulting current voltage.
FIG. 2A
shows typical voltage signals that can be applied to a phase change material RAM memory cell for setting the resistive state of the memory cell, and therefore, the logical state of the memory cell. A first voltage waveform
210
can be designated as a write signal. The write signal
210
includes a voltage level great enough to cause Joule heating of the phase change material of the memory cell to transform the phase change material to an amorphous state. A second voltage waveform
220
can be designated as an erasing signal. The erasing signal includes a lower voltage that is applied for a longer duration. The erasing signal can transform the phase change material back to a crystalline state.
FIG. 2B
shows typical device temperature traces
212
,
222
that correspond with the voltage waveforms
210
,
220
of FIG.
2
A. The first voltage waveform
210
generates a first temperature trace
212
that exceeds a melting temperature (designated by line
225
) of the phase change material. The second voltage waveform
220
generates a second temperature trace
222
that does not exceed the melting temperature of the phase change material. However, the second temperature traces
222
shows that the temperature of the phase change material is elevated for a longer period of time.
FIG. 3
shows a phase change material RAM memory cell in greater detail. A bit line
310
and a word line
320
are electrically connected to a phase change material memory cell
330
. A voltage is applied to the bit line
310
and the word line
320
that causes a current I to flow through the phase change material memory cell
330
. Heat is generated that sets the state of the phase change memory cell
330
.
A disadvantage of the phase change material memory cell structure of
FIG. 3
is that the conductive bit line
310
and the conductive word line
320
each conduct significant amounts of Joule heating away from the phase change material memory cell
330
, as is designated by H and the associated arrows of FIG.
3
. Therefore, in order for the phase change material memory cell
330
to be heated enough to set a proper physical state, a greater voltage and resulting current must be applied to compensate for the heat conducted away from the phase change memory cell
330
by the conductive bit line
310
and the conductive word line
320
, than would be required without the conductive bit line
310
and the conductive word line
320
conducting heat. Generally, applying a greater amount of voltage and current is undesirable because this requires more power to be used by the RAM structure.
Additionally, the heat conduction away from the selected phase change material memory cell
330
can cause neighboring phase change material memory cells to be partially heated. The partial heating can cause the neighboring phase change material memory cells to start to change physical states. This effect is generally referred to as cross-talk, and should be minimized.
It is desirable to have an apparatus and method for a phase change material memory element structure that provide more efficient heating of the phase change material within the phase change material memory element structure. The phase change material memory element structure should be easy to fabricate. The phase change material memory element structure should minimize the effects of cross-talk between neighboring phase change material memory elements within an array of phase change material memory elements.
SUMMARY OF THE INVENTION
The invention includes a phase change material memory element structure, and method of forming, that provides more efficient heating of a phase change material within the phase change material memory element structure. The phase change material memory element structure is easy to fabricate. The phase change material memory element structure minimizes the effects of cross-talk between neighboring phase change material memory elements within an array of phase change material memory elements.
A first embodiment of the invention includes an electronic memory structure. The electronic memory structure includes a substrate. A substantially planar first conductor is formed adjacent to the substrate. An interconnection layer is formed adjacent to the first conductor. A phase change material element is formed adjacent to the interconnection layer. The interconnection layer includes a conductive interconnect structure extending from the first conductor to the phase change material element. The interconnect structure includes a first surface physically connected to the first conductor. The interconnect structure further includes a second surface attached to the phase change material element. The second surface area of the second surface is substantially smaller than a first surface area of the first surface. A substantially planar second conductor is formed adjacent to the phase change material element.
A second embodiment of the invention includes an electronic memory structure. The electronic memory structure includes a substrate, and a substantially planar first conductor formed adjacent to the substrate. An interconnection layer is formed adjacent to the first conductor. A phase change material element is formed adjacent to the interconnection layer. The interconnection layer includes a conductive interconnect structure extending from the first conductor

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