Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
1999-07-29
2003-02-25
Chow, Dennis-Doon (Department: 2775)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S055000, C345S067000, C345S066000
Reexamination Certificate
active
06525701
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention is related to a method for driving a plasma display panel, and more particularly, to a method for driving a plasma display panel, in which a reset discharge that makes all wall charge states of cells uniform is induced to occur at a position under a black matrix during a reset period for improving a contrast.
2. Background of the Related Art
The plasma display panel and LCD(Liquid Crystal Display) are spotlighted as next generation displays of the greatest practical use, and, particularly, the plasma display panel has wide application as a large sized display, such as an outdoor signboard, a wall mounting type TV, a display for a movie house because the plasma display panel has a higher luminance and a wide angle of view than the LCD.
As shown in
FIG. 1A
, a general plasma display panel of triode surface discharge type has an upper substrate
10
and a lower substrate
20
bonded together facing each other.
FIG. 1B
illustrates a section of a plasma display panel shown in
FIG. 1A
, wherein the lower substrate
20
is shown with a face of the lower substrate
20
rotated by 90° for convenience of explanation.
The upper substrate
10
is provided with scan electrodes
16
and
16
′ and sustain electrodes
17
and
17
′ formed in parallel, and a dielectric layer
11
and a protection film
12
each coated on the scan electrodes
16
and
16
′ and the sustain electrodes
17
and
17
′ in succession, the lower substrate
20
is provided with address electrodes
22
, a dielectric film
21
formed on an entire surface of the substrate inclusive of the address electrodes
22
, barriers
23
formed on the dielectric film
21
between the address electrodes
22
, and a fluorescent material
24
coated on surfaces of the barrier
23
and the dielectric film
21
in each of the discharge cells, and a space between the upper substrate
10
and the lower substrate
20
is filled with a mixture of inert gases, such as helium or xenon, at a pressure in a range of 400 to 500 Torr, to form a discharge region. In general, the inert gas filled in the discharge space in a DC plasma display panel is a mixture of helium and xenon, and the inert gas filled in the discharge space in an AC plasma display panel is a mixture of neon and xenon.
As shown in
FIGS. 2A and 2B
, the scan electrodes
16
and
16
′ and the sustain electrodes ma
17
and
17
′ are transparent electrodes
16
and
17
or bus electrodes
16
′ and
17
′ of a metal for increasing a light transmittivity of the discharge cells.
FIG. 2A
illustrates a plan view of the sustain electrodes
17
and
17
′ and the scan electrodes
16
and
16
′, and
FIG. 2B
illustrates a section of the sustain electrodes
17
and
17
′ and the scan electrodes
16
and
16
′. The bus electrodes
16
′ and
17
′ have a discharge voltage provided thereto from an external driver IC, and the transparent electrodes
16
and
17
have the discharge voltage provided to the bus electrodes
16
′ and
17
′ provided thereto, for causing a discharge between adjacent transparent electrodes
16
and
17
. The transparent electrode
16
and
17
has a total width of approx. 300 &mgr;m, and formed of indium oxide or tinoxide, and the bus electrode
16
′ and
17
′ has a thin film of three layers of Cr—Cu—Cr. The but electrode
16
′ and
17
′ has a line width which is approx. ⅓ of a line width of the transparent electrode
16
and
17
.
FIG. 3
illustrates a wiring for the scan electrodes Sm−1, Sm, Sm+1, - - - , Sn−1, Sn, Sn+1 and the sustain electrodes Cm−1, Cm, Cm+1, - - - , Cn−1, Cn, Cn+1, formed on the upper substrate, wherein the scan electrodes are insulated from one another, while all of the sustain electrodes are connected in parallel. Particularly, an area shown by dotted line in
FIG. 3
denotes an effective area in which an image is displayed, and the other area denotes a non-effective area in which no image is displayed. The scan electrodes disposed in the non-effective area are called dummy electrodes
26
, of which number is not limited, especially.
The operation of the aforementioned AC plasma display panel of a triode surface discharge type will be explained with reference to FIGS.
4
A~
4
D.
Referring to
FIG. 4A
, upon application of a driving voltage between the address electrode and the scan electrode, an opposed discharge takes place between the address electrode and the scan electrode. This-opposed discharge produces ions as the inert gas filled in the discharge cell is excited momentarily and transited to a ground state, and a portion of ions, or atoms in a quasi-excited state, generated in this time, is collided at surfaces of the protection layer as shown in FIG.
4
B. These electron collision cause emission of secondary electrons from surfaces of the protection layer. The secondary electrons collide at a plasma state gas, which spreads the discharges. Upon finish of the opposed discharge between the address electrode and the scan electrode, wall charges of opposite polarities are formed at respective protection layer surfaces of the address electrode and the scan electrode as shown in FIG.
4
C. And, as shown in
FIG. 4D
, if the driving voltage provided to the address electrode is cut off while the discharge voltages of opposite polarities are kept provided to the scan electrodes and the sustain electrodes, a surface discharge caused by a potential difference between the scan electrodes and the sustain electrodes takes place in a discharge region of surfaces of the dielectric layer and the protection layer. These opposed discharge and the surface discharge causes electrons present in the discharge cell to collide onto the inert gas in the discharge cell, to excite the inert gas in the discharge cell to emit a UV ray with a wavelength of 147 nm in the discharge cell. The UV ray collides onto the fluorescent material coated on the address electrode and the barrier, to excite the fluorescent material, to emit a visible light, that forms an image on a screen. One pixel has a discharge cell of a red fluorescent material, a discharge cell of a green fluorescent material, and a discharge cell of a blue fluorescent material. By controlling a number of discharges in each of the discharge cells, the plasma display panel implements a gradation of an image. In this instance, the discharges taken place in each of the discharge cells consists of the address discharge for initiating a discharge, a sustain discharge for sustaining a discharge of the discharge cell, and an erase discharge for stopping the discharge of the discharge cell. Though there are a sub-field method and a sub-frame method in methods for driving a plasma display panel for implementing an image using those address discharge, the sustain discharge, and the erase discharge, a driving method widely used generally is an ADS(Address Display Separating) sub-field method in which an address discharge period and a sustain discharge period are separated. In order to implement a 2
×
gradation in the ADS sub-field method, one frame of image is divided into Y sub-field frames of images before displaying the image, and an external video data is digitized into an X bit digital video data before the external video data is provided to the plasma display panel(where, X≦Y). And, each sub field frame consists of a reset period, an address period, and a sustain period. Identical reset period and address period are assigned to every sub field. Different sustain periods are assigned to the sub fields depending on a weighted value of bits of the digital video data to be displayed in the address period. Therefore, a combination of the sub fields implements a gradation of the image. As an example, as shown in
FIG. 5
, when one frame is divided into
8
sub fields(SF
1
, SF
2
, SF
3
, SF
4
, SF
5
, SF
6
, SF
7
and SF
8
), and luminances of 1, 2, 4, 8, 16, 32,
Chow Dennis-Doon
Fleshner & Kim LLP
LG Electronics Inc.
Nelson Alecia
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