Semiconductor device manufacturing: process – Cleaning of wafer as interim step
Reexamination Certificate
2002-01-08
2003-10-21
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Cleaning of wafer as interim step
C134S026000
Reexamination Certificate
active
06635590
ABSTRACT:
FIELD OF THE INVENTION
This invention generally relates to removal of polymer residues following an etching process and more particularly to an in-situ wet polymer stripping (PRS) apparatus and processes whereby polymer residues are removed following an etching process.
BACKGROUND OF THE INVENTION
In the fabrication of semiconductor devices multiple layers may be required for providing a multi-layered interconnect structure. During the manufacture of integrated circuits it is common to place material photoresist on top of a semiconductor wafer in desired patterns and to etch away or otherwise remove surrounding material not covered by the resist pattern in order to produce metal conductor runs or other desired features. During the formation of semiconductor devices it is often required that the conductive layers be interconnected through holes in an insulating layer. Such holes are commonly referred to as contact holes, i.e., when the hole extends through an insulating layer to an active device area, or vias, i.e., when the hole extends through an insulating layer between two conductive layers. The profile of a hole is of particular importance since that it exhibits specific electrical characteristics when the contact hole or via is filled with a conductive material.
In anisotropic etching processes, such as those using halocarbon containing plasmas, polymer deposition on the sidewalls and bottom surface of the contact hole or via being etched occurs simultaneously with the etching of the oxide or the metal, as the case may be. Surfaces struck by the ions at a lower rate tend to remove the nonvolatile polymeric residual layer at a lower rate, thereby at steady state, leaving a layer of nonvolatile polymeric or metal-polymeric residue on surfaces such as the sidewalls of the etched opening, thereby protecting such surfaces against etching by the reactive gas. As such, etching is performed preferentially in a direction perpendicular to the wafer surface since the bottom surfaces etch at a higher rate than the polymeric residue containing sidewalls (i.e., anisotropic etching). If metal is being etched, for example, in the case where an oxide is etched through to expose an underlying metal layer, metal will simultaneously deposit with the polymer thus forming a metal-polymer residue on the sidewalls of the etched opening.
In a typical process, for example, in a via hole etch process, an inter-metal dielectric (IMD) layer is provided over a metallic contact layer, and a photoresist layer is provided over the IMD layer, the photoresist layer being patterned for etching through the IMD layer to the metal contact layer.
After the via holes are etched, but before the holes are filled with a conductive material, the photoresist mask which remains on top of the desired features may be removed by a dry etching method known as a reactive ion etch (RIE) or ashing process in a quartz chamber using a plasma of O
2
or a combination of CF
4
and O
2
to react with the photoresist material.
It has been the practice in the art to remove at least the photoresist in-situ by an ashing process following an etching procedure where metal is exposed, for instance after etching through the IMD layer to the metal conductive layer, since exposure of the metal to atmospheric conditions can cause metallic corrosion. In such an in-situ ashing process, the photoresist removal may take place by a reactive ion etching (RIE) method using an oxygen containing plasma in a stripper chamber module of a metal etcher such as, for example, the LAM TCP 9600 DSQ Stripper Chamber. The LAM Research TCP 9600 single wafer metal etcher is an example of a state-of-the-art single wafer RIE or plasma etch tool for etching metal conductor patterns, such as aluminum or aluminum-silicon-copper alloys. The Stripper Chamber is just one module in a series of modules included a metal etching apparatus as in, for example, the LAM TCP 9600.
A representative schematic layout of a series of modules for metal etching and photoresist stripping in a typical metal etching apparatus is shown in FIG.
1
. In a typical process, a wafer is inserted into the load indexer
10
, from which it is remotely transferred to the wafer orienter
12
, as indicated by an arrow representing process flow direction, then to the entrance loadlock module
14
, and finally to the reaction chamber module
16
where the main etching process takes place including metal etching. After etching, the wafer is moved downstream to a DSQ (DownStream Quartz) asher/stripper module
18
where the photoresist mask is removed by an ashing process involving a reactive ion etch (RIE) using an oxygen containing plasma. Following the ashing process, the wafer substrate is transferred to the APM (Atmospheric Passivation Module)
20
where it is rinsed in a deionized water bath
21
supplied through deionized water supply
22
through line
23
to remove any residual halogens from the metal etching process such as chlorine. Finally the wafer substrate is transferred to the unload indexer
24
for unloading of the wafer.
Maximum efficiency for such an in-line processing is obtained when processes are simultaneously performed in both chambers and when the process times for each chamber (module) are approximately equal, so that one of the chambers does not stand idle while awaiting completion of the process in the other chamber.
A processing difficulty arises, however, when a metal-polymer residue forms upon etching for example, a via hole. In a typical etching process, etching takes place through the inter-metal dielectric (IMD) layer to expose an underlying metallic contact. Typically the metallic portion is over etched to assure adequate contact of the via hole (which will later be filled with a metallic material) with the underlying metal contact layer. As a result, during the etching process, a metal-polymer residue is formed on the sidewalls of an etched opening that cannot be removed by the reactive ion etching (RIE) or ashing process.
Further, the RIE process to remove the overlying photoresist may tend to oxidize the metal-polymer residue formed on the sidewalls of an etched opening thereby making it even more resistant to an RIE cleaning process. As a result, the metal-polymer residue formed on the sidewalls of an etched opening cannot be successfully removed by an RIE process and must be removed by a wet process. It has been found necessary in the art to remove the process wafers from the metal etcher, to subject the process wafers with the metal-polymer residue to a wet polymer strip process (PRS) to remove the metal-polymer residue.
Since frequently, semiconductor device processing includes many layers that must be interconnected by vias or metal contact holes, removing a wafer from the metal etcher for wet chemical stripping or polymer stripping (PRS) to remove the metal-polymer residue remaining after each process where a metal layer is partially etched, can prove very time consuming when, for example, a 0.15 micron logic device with seven (7) metal layers is manufactured. In this case, for example, a throughput can be calculated to be about 1.5 hours per metal layer or alternatively, more than 12 hours per wafer lot.
Other drawbacks of an ex-situ wet polymer strip process (PRS), using for example a wet bench setup, include the possibility of particle contamination of the wafer upon removal from the metal etcher. Further, since adequate metal-polymer residue removal may require more than one process station where the wafer is immersed into a chemical solution, the chemical cost may be high.
FIG. 2
shows a typical wet polymer strip process (PRS) bench configuration
200
. In a typical wet polymer strip process, wafers are loaded into a loading module
201
, transferred to a wet bench process line beginning with a mounting station
202
. The wafer is typically immersed in a plasma etching cleaning solution at one or more stations e.g.,
204
A,
204
B, using for example, ACT (e.g., 690C) available from Ashland Chemical composed of DMSO (Dimethyl-sulphur-oxuide), MEA (Mono-Et
Taiwan Semiconductor Manufacturing Co. Ltd.
Tung & Associates
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