Miscellaneous active electrical nonlinear devices – circuits – and – Gating – Signal transmission integrity or spurious noise override
Reexamination Certificate
2002-07-23
2003-06-10
Lam, Tuan T. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Gating
Signal transmission integrity or spurious noise override
C326S015000, C326S121000
Reexamination Certificate
active
06577178
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to semiconductor integrated circuit design, and more particularly to a semiconductor integrated circuit that provides the performance associated with thin oxide transistors with the reduced tunneling current associated with thick oxide transistors.
2. Description of the Related Art
A challenge facing circuit designers is how to continue to improve circuit performance with the adverse effects of continued device scaling. If the designer scales the gate oxide to below 1.3 nm, the results are disappointing and the circuit has very high tunneling currents from the gate to the inversion layer and to the body or substrate. Moreover, tunneling currents above 100 A/cm
2
makes the standby power excessive for many applications.
Thin oxide transistors operate at a much higher speed than thick oxide transistors. However, thin oxide transistors suffer significantly higher tunneling currents than thick oxide transistors. Therefore, designers have had to choose between using lower performance thick oxide transistors (to reduce standby power consumption) and thin oxide transistors (to increase performance when designing circuits).
Some conventional solutions, which aim to avoid the negative effects of tunneling current of thin oxide transistors only apply to one dynamic logic family, thereby limiting the applications of the design. Moreover, these prior art solutions also result in trading off active power for passive power, a result which is both undesirable and limiting.
In U.S. Pat. No. 5,644,266 issued to Chen et al., “Dynamic Threshold Voltage Scheme for Low Voltage CMOS Inverter,” the complete disclosure of which is herein incorporated by reference, it is described that the bodies of conventional static circuits along with the gates of the FETs are connected through a series of blocking capacitors with a resistor (of high value) from body to source. In this conventional design, the current-drawing input (the body) is momentarily biased into conduction in order to enable faster switching of the device, and then is allowed to relax to a low current state. However, one of the major drawbacks of this and other conventional devices is that this method of body-voltage modulation produces substantially deficient drive gains.
Thus, there is a need for a semiconductor integrated circuit that provides the performance associated with thin oxide transistors with the reduced tunneling current associated with thick oxide transistors and a circuit design which achieves much greater drive gains than can be achieved by body-voltage modulation alone. Moreover, there is a need for a novel circuit design which is much broader in its application, for example, one which can also be applied to multi-dynamic logic families. Furthermore, there is a need for a simple, yet effective circuit which reduces the active-power-for-passive-power-trade-off.
BRIEF SUMMARY OF THE INVENTION
In view of the foregoing and other problems, disadvantages, and drawbacks of the conventional circuit designs the present invention has been devised, and it is an object of the present invention to provide a structure and method for a semiconductor integrated circuit with tunneling current control. Yet another object of the present invention is to provide a semiconductor integrated circuit design which has a broad application, for example, one which can be applied to multiple dynamic logic families. It is still another object of the present invention to provide a simple, yet effective circuit which reduces the active-power for passive-power trade-off.
In order to attain the objects suggested above, there is provided, according to one aspect of the invention a circuit that includes a resistance-capacitance (RC) structure connected to a first set of transistors and a second set of transistors that perform the same logical function as the first set of transistors. The first set of transistors have thinner gate oxides than the second set of transistors. The RC structure drains an electric field from the first set of transistors, such that the first set of transistors are on, in parallel with the second set of transistors, only during initial transistor switching. The thin oxide devices are stronger and pass more current (e.g, have performance). The interest in the thin oxide devices is the increased device current arising from their stronger coupling to the inversion channel. The thin oxide devices are pulsed on only during the transition period, leaving the thick oxide devices on after the transition period to maintain level current for the remainder of the cycle. The motivation is to turn the thin oxide devices off to cut tunneling current during inactivity. Also, the first set of transistors and the second set of transistors share common inputs and outputs. The RC structure includes a capacitor connected to a gate of the first set of transistors and a resistor connected to the capacitor and to ground.
Thus, according to the present invention, a new circuit design is disclosed which allows for much higher-performance thin-oxide MOSFETs to momentarily switch to achieve much greater drive gains than can be achieved by devices using only thicker oxides which avoid tunneling leakage current.
There are several benefits of the present invention. First, the invention provides a semiconductor integrated circuit that has the performance associated with thin oxide transistors and the reduced tunneling current associated with thick oxide transistors. The present invention has a broad application because, as would be known by one ordinarily skilled in the art given the following disclosure, the invention can be applied to dynamic logic families. Moreover, the present invention provides a simple, yet effective circuit which results in reducing the active-power for passive-power trade-off.
REFERENCES:
patent: 4277782 (1981-07-01), Chao
patent: 5461265 (1995-10-01), Kunihisa et al.
patent: 5644266 (1997-07-01), Chen et al.
patent: 6424015 (2002-07-01), Ishibashi et al.
Bernstein Kerry
Cottrell Peter E.
Nowak Edward J.
Rohrer Norman J.
Stout Douglas W.
Henkler, Esq. Richard A.
International Business Machines - Corporation
Lam Tuan T.
McGinn & Gibb PLLC
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