Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Amorphous semiconductor material
Reexamination Certificate
2001-09-05
2003-12-09
Everhart, Caridad (Department: 2825)
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Amorphous semiconductor material
C257S072000, C438S057000, C438S149000
Reexamination Certificate
active
06661025
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of manufacturing an electro-optical apparatus substrate that sequentially has a light shield layer of a predetermined pattern, an insulation layer and a transistor element on a surface of an optically transparent substrate, an electro-optical apparatus substrate which is manufactured by the manufacturing method, an electro-optical apparatus having the electro-optical apparatus substrate, and an electronic apparatus.
2. Description of the Related Art
An SOI (Silicon On Insulator) technique for forming a single crystal silicon thin film on an insulating substrate and then forming a semiconductor device of the single crystal silicon thin film has the merits of making a speed of an element faster, making a consumption power lower and making an integration degree higher. Thus, it is preferably used in an electro-optical apparatus, for example, such as a liquid crystal device and the like.
When the SOI technique is applied to the electro-optical apparatus as mentioned above, a single crystal silicon layer of a thin film is formed by laminating a single crystal silicon substrate on an optically transparent substrate and then polishing it. So, a transistor element, for example, such as MOSFET for driving a liquid crystal or the like, is constituted by the single crystal silicon layer.
By the way, in a projection display, for example, such as a projector using a liquid crystal device or the like, a light is inputted from the side of the optically transparent substrate (i.e., one surface of the liquid crystal device) which is one of the two substrates constituting the liquid crystal device. In order to prevent a light leak current from being generated as this light is inputted to a channel region of the transistor element formed on the surface of the other substrate, it is typically designed to form a light shield layer on the side of the transistor element, at which the light is inputted.
However, even if the light shield layer is formed on the side of the transistor element at which the light is inputted, when the substrate on which the transistor element is formed has the optically transparent property, the light inputted to the liquid crystal device may be reflected on a boundary face of a rear of the substrate on which the transistor element is formed, and may be inputted to the channel portion of the transistor element as a return light. This return light is little as a rate with respect to an amount of the lights inputted from the surface of the liquid crystal device. However, there may be the considerable possibility that the light leak current is generated in an apparatus using a very strong light source such as a projector or the like. That is, the return light from the rear of the substrate on which the transistor element is formed has an influence on a switching property of the element, and causes the performance of the element to be deteriorated. By the way, here, let us suppose that the plane on which the single crystal silicon layer is formed is referred to as the surface of the substrate, and the opposite side is referred to as the rear.
Japanese Laid Open Patent Application (JP-A-Heisei, 10-293320) proposes a technique for forming a light shield layer on a surface of a substrate on which transistor elements are formed, correspondingly to each transistor element. This proposes a method of forming the light shield layer of a predetermined pattern on the substrate surface, and forming an insulation layer on the light shield layer, and then polishing and smoothing a surface of the insulation layer and laminating or bonding a single crystal silicon substrate on the polished surface.
However, in the typical electro-optical apparatus, the transistor elements are formed only in a display region (pixel portion) on the surface of the substrate, and the transistor elements are not formed in a non-display region. In this way, there are the region in which the transistor elements are crowded (the formation region) and the non-crowded region (the non-formation region) in which the transistor elements are not crowded. For this reason, each piece of light shield layers disposed correspondingly to the respective transistor elements are distributed at the similar density. As a result, concave and convex portions are formed on a surface of the insulation layer formed on the light shield layers, and a certain distribution is also induced in those concave and convex portions. Thus, even if the surface of the insulation layer is polished, the variation in the polished degree is induced on the surface of the substrate. So, even if the entire surface of the substrate is polished, the insulation layer becomes relatively thick in the portion where the convex portions are crowded, and the insulation layer becomes relatively thin in the portion where the convex portions are not crowded (i.e., the portion where the concave portions are crowded). Hence, this leads to the fear of the degradation in the smoothness or flatness on the surface of the insulation layer after the polishing operation.
For example, as shown in FIG.
19
(
a
), assuming that a region
1010
where light shield layers
1003
are crowded and a region
1020
where the shield layers
1003
are not crowded exist on a surface of a substrate
1001
, the number and the area of concave portions formed on the region
1020
where the light shield layers
1003
are not crowded are greater and wider than those of the region
1010
where the light shield layers
1003
are crowded, on a surface of an. insulation layer
1004
formed on the substrate
1001
on which the light shield layers
1003
have been formed. By the way, even in the region
1010
where the light shield layers
1003
are crowded, minute concave and convex portions are formed on the surface of the insulation layer
1004
, depending on the patterns of the light shield layers
1003
. However, they are omitted on FIG.
19
(
a
), for the simplicity.
As mentioned above, if the surface of the insulation layer
1004
having the distribution in the concave and convex portions is polished, the region in which the area of the convex portions is narrower (i.e., the region
1020
where the light shield layers:
1003
are not crowded) is polished faster than the region in which the area of the convex portions is wider (i.e., the region
1010
where the light shield layers
1003
are crowded), on the surface of the insulation layer
1004
. As a result, as shown in FIG.
19
(
b
), the insulation layer
1004
in the region
1020
where the light shield layers
1003
are not crowded is excessively polished, which causes a stage difference between the region
1010
where the light shield layers
1003
are crowded and the region
1020
where they are not crowded, on the surface of the insulation layer
1004
. Accordingly, the smoothness on the surface of the insulation layer
1004
is made lower.
As mentioned above, the drop in the smoothness on the surface of the insulation layer brings about the following problems. As the first problem, there may be the fear that a void is induced on the lamination boundary between the insulation layer and the single crystal silicon layer, and this causes the deterioration in the performance of the transistor element formed in the region where this void exists. As the second problem, there may be the fear that the strength of the lamination between the insulation layer and the single crystal silicon layer is reduced, which causes the defect of film strip and the like to be induced in the process of forming the transistor element after the formation of the single crystal silicon layer, and thereby results in the drop in a yield of a product.
In addition, even if the insulation layer surface can be smoothed or flattened, there is no method of detecting an ending point of polishing i.e., a moment when the insulation layer has been completely smoothed. Thus, the polishing process is controlled only by the polishing time duration. However, since the polishing rate is c
Everhart Caridad
Oliff & Berridg,e PLC
Seiko Epson Corporation
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