Method for manufacturing a low-profile semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads

Reexamination Certificate

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Details

C257S738000, C257S778000, C257S780000, C257S779000

Reexamination Certificate

active

06580168

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a method for manufacturing a low-profile semiconductor device.
2. Description of the Related Art
The sizes of semiconductor chips can vary widely with different chip packaging techniques. With the rapid advancement in electronic devices, minimization of profiles of semiconductor chips has been a major concern of manufacturers. Although the profiles of semiconductor chips can be made relatively low by current packaging techniques, there is still a need to further reduce the profiles of the semiconductor chips.
SUMMARY OF THE INVENTION
Therefore, the main object of the present invention is to provide a method for manufacturing a semiconductor device with a low-profile.
Another object of the present invention is to provide a low-profile semiconductor device.
According to one aspect of the present invention, there is provided a method for manufacturing a semiconductor device. The method comprises the steps of: preparing a chip-mounting substrate having a chip-mounting surface that is provided with at least a conductive contact thereon; preparing a semiconductor chip having a pad-mounting surface that is provided with at least a bonding pad thereon; forming a hardened photoresist layer on one of the bonding pad and the conductive contact, the hardened photoresist layer having a geometric dimension that is smaller than that of said one of the bonding pad and the conductive contact so as to expose a portion of said one of the bonding pad and the conductive contact therefrom; forming a conductive layer that encloses the hardened photoresist layer and that covers the portion of said one of the bonding pad and the conductive contact so as to form a conductive bump on said one of the bonding pad and the conductive contact; forming a plurality of spaced apart supporting pads on the pad-mounting surface; and attaching the chip-mounting substrate to the semiconductor chip such that the other one of the bonding pad and the conductive contact is electrically connected to the conductive bump and such that the supporting pads interconnect the chip-mounting surface of the chip-mounting substrate and the pad-mounting surface of the semiconductor chip.
According to another aspect of the present invention, a semiconductor device comprises: a semiconductor chip having a pad-mounting surface that is provided with at least a bonding pad thereon; a plurality of supporting pads formed on the pad-mounting surface; a chip-mounting substrate attached to the semiconductor chip and having a chip-mounting surface that is formed with at least a conductive contact; and at least a conductive bump which is formed on one of the bonding pad and the conductive contact, the conductive bump including a hardened photoresist layer that is formed on said one of the bonding pad and the conductive contact and that has a geometric dimension smaller than that of the bonding pad so as to expose a portion of said one of the bonding pad and the conductive contact therefrom, the conductive bump further including a conductive layer enclosing the hardened photoresist layer and covering the portion of said one of the bonding pad and the conductive contact; the chip-mounting substrate being attached to the semiconductor chip in a manner that the other one of the bonding pad and the conductive contact is electrically connected to the conductive layer of the conductive bump and that the supporting pads interconnect the chip-mounting surface of the chip-mounting substrate and the pad-mounting surface of the semiconductor chip.


REFERENCES:
patent: 6046910 (2000-04-01), Ghaem et al.

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