Metal working – Method of mechanical manufacture – Electrical device making
Reexamination Certificate
2000-09-22
2003-09-23
Tugbang, A. Dexter (Department: 3729)
Metal working
Method of mechanical manufacture
Electrical device making
C029S610100, C029S621000, C029S847000, C029SDIG001, C427S101000, C338S307000, C338S308000, C338S314000
Reexamination Certificate
active
06622374
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to multi-layer printed circuit boards and, more particularly, to a resistive component usable in forming boards with embedded resistive layers.
BACKGROUND OF THE INVENTION
A basic component of a printed circuit board is a dielectric layer having a sheet of copper foil bonded thereto. Through a subtractive process that includes one or more etching steps, portions of the copper foil are etched away to leave a distinct pattern of conductive lines and formed elements on the surface of the dielectric layer. Multi-layer printed circuit boards are formed by stacking and joining two or more of the aforementioned dielectric layers having printed circuits thereon. Many printed circuit boards include conductive layers containing patterned components that perform like specific, discreet components. One such discreet component is a resistive element formed from a resistor foil. A resistor foil is basically a copper foil having a thin layer of resistive material, typically a metal or metal alloy deposited onto one surface thereof. The resistor foil is attached to a dielectric substrate with the resistive material adhered to the dielectric substrate. Using conventionally known masking and etching techniques, the copper foil and resistive material are etched away to produce a trace line of copper with the resistive material therebelow on the surface of the dielectric. A section of the copper layer is removed leaving only the resistive material on the surface connecting the two separated ends of the copper. Because the material forming the resistive layer typically has a conductivity less than copper, it essentially acts as a resistor between the separated ends of the copper trace lines. The thickness and width of the resistive layer, as well as the length of the resistive layer disposed between the ends of the copper traces, affect the resistance of the resistive element so formed.
The present invention represents an improvement over resistor foils known heretofore and provides a resistor foil having multiple layers of resistive material on a copper layer, thereby facilitating the formation of a variety of different resistive elements having a variety of resistance values.
SUMMARY OF THE INVENTION
In accordance with a preferred embodiment of the present invention, there is provided a resistor foil, comprised of a copper layer having a first side and a second side. A tiecoat metal layer having a thickness of between 5 Å and 70 Å is provided on the first side of the copper layer. A first layer of a first resistor metal having a thickness of between 100 Å and 500 Å is on the tiecoat metal layer, and a second layer of a second resistor metal having a thickness of between 100 Å and 500 Å is on the first layer of the first resistor metal. The first resistor metal has a resistance different from the second resistor metal.
In accordance with another embodiment of the present invention, there is provided a method of forming a resistive element on a printed circuit board, comprising the steps of:
a) adhering a resistor foil to a dielectric substrate, the resistor foil comprised of:
a copper layer having a first side and a second side;
a tiecoat metal layer having a thickness of between 5 Å and 70 Å on the first side of the copper layer;
a first layer of a first resistor metal on the tiecoat metal layer; and
a second layer of a second resistor metal on the first layer of the first resistor metal, the first resistor metal having a resistance different from the second resistor metal, the resistor foil adhered to the substrate with the second layer of the second resistor metal facing the dielectric substrate;
b) forming a circuit trace line on the dielectric substrate from the resistor foil; and
c) removing a portion of the copper layer and the tiecoat metal layer from the circuit trace line to define a section of the circuit trace line comprised of the first and second layer of resistor metals.
REFERENCES:
patent: 2662957 (1953-12-01), Eisler
patent: 3368919 (1968-02-01), Casle
patent: 3489656 (1970-01-01), Balde
patent: 3621442 (1971-11-01), Racht
patent: 3742120 (1973-06-01), Keister
patent: 3833410 (1974-09-01), Ang et al.
patent: 3849757 (1974-11-01), Khammous
patent: 3857683 (1974-12-01), Castonguay
patent: 3864825 (1975-02-01), Holmes
patent: 4164607 (1979-08-01), Thiel
patent: 4203025 (1980-05-01), Nakatani
patent: 4396900 (1983-08-01), Hall
patent: 4482882 (1984-11-01), Liider
patent: 4503112 (1985-03-01), Konicek
patent: 4517546 (1985-05-01), Kakuhashi et al.
patent: 4585537 (1986-04-01), Nakayama et al.
patent: 4617575 (1986-10-01), Fuyama et al.
patent: 4892776 (1990-01-01), Rice
patent: 5038132 (1991-08-01), Lindblom et al.
patent: 5039570 (1991-08-01), Sturm
patent: 5128008 (1992-07-01), Chen et al.
patent: 5172473 (1992-12-01), Burns et al.
patent: 5243320 (1993-09-01), Clouser et al.
patent: 5389446 (1995-02-01), Yamanishi et al.
patent: 5661902 (1997-09-01), Katchmar
patent: 5689227 (1997-11-01), Nguyen et al.
patent: 5709957 (1998-01-01), Chiang et al.
patent: 5863666 (1999-01-01), Merchant et al.
patent: 5908544 (1999-06-01), Lee et al.
patent: 0 007 598 (1980-02-01), None
patent: 0 452 812 (1991-10-01), None
patent: 0 540 820 (1993-05-01), None
patent: 690691 (1953-04-01), None
patent: 58095301 (1983-06-01), None
patent: 1-298796 (1989-12-01), None
patent: 406120630 (1994-04-01), None
patent: 08235540 (1996-09-01), None
“Structure and Magnetic Properties of FE1-XNIX/CU Invar Superlattics,” Tang et al., Journal of Applied Physics, US, American Institute of Physics, New York, vol. 80, No. 4, Aug. 15, 1996, pp. 2327-2333, XP000633333.
“Transmission Electron Microscope Study of Thin Cu-Ni Laminates Obtained by Vapor Deposition,” Nakahara et al., International Conference on Metallurgical Coatings, San Diego, CA, US, Apr. 21-25, 1980, vol. 72, No. 2, pp. 277-284, XP000993586.
Centanni Michael A.
Clouser Sidney J.
Wang Jiangtao
Gould Electronics Inc.
Jaffe Michael A.
Kusner Mark
Tugbang A. Dexter
LandOfFree
Resistor component with multiple layers of resistive material does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Resistor component with multiple layers of resistive material, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Resistor component with multiple layers of resistive material will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3110772