Strictly non-blocking switch core having optimized switching...

Optical waveguides – With optical coupler – Switch

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

Reexamination Certificate

active

06591028

ABSTRACT:

STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT
Not Applicable
BACKGROUND OF THE INVENTION
Optical switches and switching architectures are used in optical networks for a variety of applications. One application of optical switches is in provisioning of light paths. In this application, the switches are used to form optical cross-connect architectures, which can be readily reconfigured to support new light paths. In this application, the switches are replacements for manual fiber patch panels. As such, switches with millisecond switching times are acceptable. The challenge with respect to such applications is to realize large switch sizes.
At the heart of the optical switch is the switch core. In terms of switching function, switch cores may be characterized as either blocking or non-blocking architectures. A switch core architecture is said to be non-blocking if any unused input port can be connected to any unused output port. Thus a non-blocking switch core is capable of realizing every interconnection pattern between the inputs and the outputs. If some interconnection patterns cannot be realized, the switch is said to be blocking.
A popular architecture for building large non-integrated switch cores is the Spanke architecture illustrated in FIG.
1
. In accordance with the Spanke architecture, an N×N switch is made by combining N switches of the 1×N switch type along with N switches of the N×1 switch type, as illustrated. The Spanke architecture results in a strictly non-blocking switch core architecture that requires 2N switches. The switch illustrated in
FIG. 1
is a 4×4 switch core.
The increasing popularity of optical networks has resulted in the need for larger optical switch cores, thereby increasing the number of input and output channels (N). Since, in accordance with the formula above, the total number of switches used as well as the size of each switch in the Spanke switch core architecture increases substantially as the number of input and output channels increases, the cost of providing a large switch is significant and, in some instances, prohibitive.
The present inventors have recognized the reciprocal nature of the connections in a typical optical switch core employed in a conventional optical network. These reciprocity conditions have been used by the present inventors to provide a strictly non-blocking optical switch core architecture that significantly reduces the number of switches that are required to construct the switch core.
BRIEF SUMMARY OF THE INVENTION
A switch core is set forth that comprises a plurality of duplex switches that are interconnected with an interconnection fabric to implement, for example, strictly non-blocking operation of the switch core for reciprocal traffic. In one embodiment, an N-way reciprocal switch is implemented. The N-way reciprocal switch comprises a plurality of duplex switches numbering N of at least a 1×(N−1) switch type (e.g., the duplex switches have at least N−1 ports available for connection to implement the interconnection fabric). The interconnection fabric interconnects the plurality of duplex switches so that each duplex switch is connected to every other duplex switch used in the interconnection fabric by a single connection. Such an architecture may also be used to implement a switch that is not strictly non-blocking.
In a second embodiment, an LM multi-stage reciprocal switch core having recursive properties and corresponding (n, m)-way switches are set forth. The LM multi-stage reciprocal switch core is comprised of a plurality of M-way reciprocal switches numbering at least 2L−1. Each of the plurality of M-way reciprocal switches is implemented as an N-way reciprocal switch described above, where N=M. A plurality of (L, 2L−1)-way reciprocal switches numbering M are also used. The multi-stage LM reciprocal switch is itself an LM-way reciprocal switch that can be used to recursively build larger switches. For example, the LM reciprocal core switch can be used to implement a larger L
1
M
1
multi-stage switch in which M
1
=LM. Alternatively, or in addition, the M-way switches used to build the LM switch core can also be multi-stage in nature and built from smaller recursive components; i.e., from j,2j−1)-way switches and (M/j)-way switches.


REFERENCES:
patent: 3823401 (1974-07-01), Berg et al.
patent: 4038497 (1977-07-01), Collins et al.
patent: 4239329 (1980-12-01), Matsumoto
patent: 4289373 (1981-09-01), Sugimoto et al.
patent: 4493113 (1985-01-01), Forrest et al.
patent: 4684796 (1987-08-01), Johnson
patent: 4787692 (1988-11-01), Spanke
patent: 4846542 (1989-07-01), Okayama et al.
patent: 4889404 (1989-12-01), Bhagavatula et al.
patent: 4932735 (1990-06-01), Koai
patent: 5009477 (1991-04-01), Alferness et al.
patent: 5048910 (1991-09-01), Caron
patent: 5077483 (1991-12-01), Cloonan et al.
patent: 5146358 (1992-09-01), Brooks
patent: 5255332 (1993-10-01), Welch et al.
patent: 5272555 (1993-12-01), Suzuki
patent: 5274487 (1993-12-01), Fujimoto et al.
patent: 5343314 (1994-08-01), Nakamura et al.
patent: 5359683 (1994-10-01), Pan
patent: 5408350 (1995-04-01), Perrier et al.
patent: 5416662 (1995-05-01), Kurasawa et al.
patent: 5469277 (1995-11-01), Kavehrad et al.
patent: 5471340 (1995-11-01), Cheng et al.
patent: 5552918 (1996-09-01), Krug et al.
patent: 5588078 (1996-12-01), Cheng et al.
patent: 5608565 (1997-03-01), Suzuki et al.
patent: 5623562 (1997-04-01), Anderson et al.
patent: 5648963 (1997-07-01), Miyake et al.
patent: 5652813 (1997-07-01), Wilson
patent: 5663818 (1997-09-01), Yamamoto et al.
patent: 5680234 (1997-10-01), Darcie et al.
patent: 5712932 (1998-01-01), Alexander et al.
patent: 5724165 (1998-03-01), Wu
patent: 5729642 (1998-03-01), Thaniyavarn
patent: 5734763 (1998-03-01), Chang
patent: 5739933 (1998-04-01), Dembeck et al.
patent: 5742717 (1998-04-01), Saitoh
patent: 6366713 (2002-04-01), Lin et al.
patent: 33 35 128 (1985-04-01), None
patent: 0 315 351 (1989-10-01), None
patent: 2 172 174 (1986-10-01), None
Supplementary European Search Report of European Applicatin No. EP 99 94 5534, counterpart of above-identified US application, dated May 27, 2002.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Strictly non-blocking switch core having optimized switching... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Strictly non-blocking switch core having optimized switching..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Strictly non-blocking switch core having optimized switching... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3108214

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.