Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
2001-08-27
2003-04-08
Talbott, David L. (Department: 2827)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C174S255000, C174S263000, C174S264000, C029S830000, C361S792000
Reexamination Certificate
active
06545228
ABSTRACT:
Japanese Patent Application No. 2000-269102, filed Sep. 5, 2000, is hereby incorporated by reference in its entirety.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and method of manufacture thereof, circuit board, and electronic instrument.
2. Description of Related Art
With the increasingly compact nature of electronic instruments, semiconductor devices are known with a stacked construction incorporating a plurality of substrates (interposers) on which semiconductor chips are mounted laminated at high density. By means of this, the area of the circuit board (motherboard) on which the semiconductor devices are mounted is utilized efficiently, and an electronic instrument which is more compact and of high density can be manufactured.
For example, in Japanese Patent Application Laid-Open No. 8-236694, in a semiconductor device of stacked construction, connector terminals connecting upper and lower semiconductor chips are disposed on the extremity of a substrate to avoid a semiconductor chip disposed in a central portion. That is to say, connector terminals are disposed in a region of the substrate outside the semiconductor chip. Therefore, in order to limit the plan surface area of the semiconductor device, the connector terminals are preferably formed to be small and of a narrow pitch.
However, according to this, since the connector terminals are small and of a narrow pitch, in the testing of the electrical characteristics of the semiconductor devices before lamination, special manufacturing equipment must be used. The positioning of the connector terminals of the semiconductor device with respect to the manufacturing equipment is troublesome.
SUMMARY
A semiconductor device according to the first aspect of the present invention comprises:
a semiconductor chip;
a substrate having an interconnecting pattern formed thereover, the substrate having the semiconductor chip mounted on a surface thereof, the substrate having an outline larger than the semiconductor chip;
first terminals formed in a region outside a region of the substrate in which the semiconductor chip is mounted; and
second terminals being a part of the interconnecting pattern which exposes its surface opposite to a surface opposing the semiconductor chip in a region closer to a center of the substrate than the first terminals,
wherein the semiconductor chip is electrically connected to the first and second terminals.
A semiconductor device according to the second aspect of the present invention comprises a plurality of stacked semiconductor devices,
wherein each of the stacked semiconductor devices comprises:
a semiconductor chip;
a substrate having an interconnecting pattern formed thereover, the substrate having the semiconductor chip mounted on a surface thereof, the substrate having an outline larger than the semiconductor chip;
first terminals formed in a region outside a region of the substrate in which the semiconductor chip is mounted; and
second terminals being a part of the interconnecting pattern which exposes its surface opposite to a surface opposing the semiconductor chip in a region closer to a center of the substrate than the first terminals,
wherein the semiconductor chip is electrically connected to the first and second terminals,
wherein the semiconductor chips in upper and lower ones of the stacked semiconductor devices are electrically connected.
A circuit board according to the third aspect of the present invention has the above-mentioned semiconductor device mounted thereon, the circuit board electrically connected to the semiconductor device by the second terminals which the substrate of the lowest one of the stacked semiconductor devices have.
An electronic instrument according to the fourth aspect of the present invention has the above-mentioned semiconductor device.
A method of manufacture of a semiconductor device according to the fifth aspect of the present invention comprises the step of testing an electrical characteristics of the above-mentioned semiconductor device through the second terminals which the substrate have.
A method of manufacture of a semiconductor device according to the sixth aspect of the present invention comprises the step of testing an electrical characteristics of the above-mentioned semiconductor device through the second terminals which the substrate of the lowest one of the stacked semiconductor devices have.
REFERENCES:
patent: 4149764 (1979-04-01), Mattingly, Jr.
patent: 4692843 (1987-09-01), Matsumoto et al.
patent: 4897918 (1990-02-01), Osaka et al.
patent: 5343075 (1994-08-01), Nishino
patent: 5579207 (1996-11-01), Hayden et al.
patent: 5600541 (1997-02-01), Bone et al.
patent: 5602420 (1997-02-01), Ogata et al.
patent: 5723903 (1998-03-01), Masuda et al.
patent: 6049467 (2000-04-01), Tamarkin et al.
patent: 6163957 (2000-12-01), Jiang et al.
patent: 6237218 (2001-05-01), Ogawa et al.
patent: A 8-236694 (1996-09-01), None
Alcala Jose′ H.
Seiko Epson Corporation
Talbott David L.
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