Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
2001-06-14
2003-09-30
Cuneo, Kamand (Department: 2829)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
C324S763010
Reexamination Certificate
active
06628126
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates in general to testing and verification of integrated circuits and, in particular, to monitoring voltage levels in an integrated circuit. More particularly, the present invention relates to an optical voltage measurement circuit for monitoring voltage levels in an integrated circuit utilizing imaging circuit analysis.
2. Description of the Related Art
The progress in integrated circuit (IC) technology has been characterized by substantial decreases in the size and spacing of active and passive structures such as transistors and their interconnecting wires, accompanied by increases in chip complexity, size, and speed of operation. Presently, these advances have also necessitated an increase in the number of metal layers connecting the devices within the chip, and chip inputs and outputs, or I/Os, that are needed to connect the different chips in a system and the use of “flip-chip” packaging methods. Dense “metal fill” patterns inserted in all areas not populated with signal wires are commonly used to optimize chemical-mechanical polishing processes. These layers of metal wiring are often referred to as the “back end of the line,” or BEOL, portion of the IC fabrication process. This dense BEOL, especially when used in combination with flip-chip packaging, has created a situation in which the transistors in an IC and the signal-carrying metal lines are no longer physically accessible to external probes from the front side, without the destructive disassembly of the chip.
It is often necessary for IC designers and manufacturers to measure the voltages and/or currents deep inside an operating IC. This need can arise, for example, when a newly manufactured product is not performing up to specifications, or an IC is returned that has failed in the field. Currently, such measurements are carried out by means of two techniques. One uses an active or passive microscopic metal probe, which physically contacts a metal line of interest to extract an electrical signal. As an alternate to a physical probe, a focused beam of electrons may be used as a probe of the conducting lines.
The widespread use of a dense BEOL structure as well as flip-chip packaging poses a major challenge to these two techniques for measuring electrical activity in operating integrated circuits. Physical and electron-beam probing each require the metal line of interest to be at either an air-metal or vacuum-metal interface. A capacitively coupled form of electron-beam probing is possible that acquires signals through limited thicknesses of dielectric, but if the metal line is buried deep under other metal lines or thick insulators, or is covered because the chip is flipped over for packaging, neither measurement technique can be used without time-consuming and potentially destructive “deprocessing” of the chip. A further drawback is that all of the above probing techniques require signals to be acquired in a serial fashion, one at a time. For complex analysis efforts where little advanced knowledge of a failure or performance problem is available, this style of probing can be prohibitively time-consuming. Because physical and electron-beam probing are becoming less and less practical, there is a demand for new analytic tools utilizing optical inspection techniques that can “remotely” sense electrical activity in an integrated circuit through the back side (i.e., the substrate side) of a silicon IC. These imaging circuit analysis techniques, such as Picasecond Imaging Circuit Analysis (PICA), that utilize picosecond speeds of optical systems to track high-speed signals as they travel through particular gates in an IC. PICA, for example, collects the photons emitted from transistor channels in a IC during switching to form an image, or a collection of images, that is utilized to detect circuits that are switching erroneously, circuit that are failing to switch when they are supposed to, or to measure switching delays between various circuits.
One of the important characteristic of an integrated circuit to be aware of when trouble-shooting or characterizing the integrated circuit, e.g., following a failure, is the actual values of the supply power(s) present on the integrated circuit. Variations between power levels, such as a supply power (VDD) and a ground potential (GND), across the integrated circuit may manifest itself as signal noise, either AC or DC, on signals that originate in one part of the integrated circuit and which are utilized as inputs to circuits in a section of the integrated circuit. The resulting signal noise may result in erroneous operation and may even possibly induce failures in the circuits. For example, an increase or decrease in the difference between supply power and ground potentials may result in a circuit speeding up or, alternatively, slowing down its operation that, in turn, may result in a circuit failure. As discussed above, conventional image circuit analysis techniques, such as PICA, measure the photon emissions resulting from a transistor switching current and thus are not able to directly measure a potential voltage on an integrated circuit.
Accordingly, what is needed in the art is an improved method and circuit utilized in conjunction with imaging circuit analysis systems, such as PICA, that mitigates the limitations discussed above. More particularly, what is needed in the art is a circuit that allow for non-invasive monitoring and determination of supply voltages on an integrated circuit utilizing imaging circuit analysis methodologies.
SUMMARY OF THE INVENTION
It is therefore an object of the invention to provide an improved method for monitoring voltage levels in an integrated circuit.
It is another object of the invention to provide an optical voltage measurement circuit for monitoring voltage levels in an integrated circuit utilizing imaging circuit analysis.
To achieve the foregoing objects, and in accordance with the invention as embodied and broadly described herein, an optical voltage measurement circuit for use in an integrated circuit having at least one voltage power rail is disclosed. The optical voltage measurement circuit includes a reference voltage rail that, in an advantageous embodiment, is coupled to an external variable power supply. The optical voltage measurement circuit also includes a switching device, such as a N-channel field effect transistor (NFET), that selectively couples the reference voltage rail to the voltage power rail to initiate a current flow therebetween, where the current flow generates an optical emission corresponding to a potential difference between the reference voltage and voltage power rails. In a related embodiment, the optical voltage measurement circuit further includes a current limiting resistor.
The foregoing description has outlined, rather broadly, preferred and alternative features of the present invention so that those skilled in the art may better understand the detailed description of the invention that follows. Additional features of the invention will be described hereinafter that form the subject matter of the claims of the invention. Those skilled in the art should appreciate that they can readily use the disclosed conception and specific embodiment as a basis for designing or modifying other structures for carrying out the same purposes of the present invention. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the invention in its broadest form.
REFERENCES:
patent: 5940545 (1999-08-01), Kash et al.
patent: 6023186 (2000-02-01), Kuroda
patent: 6075234 (2000-06-01), Patterson
patent: 6172512 (2001-01-01), Evans et al.
patent: 6466041 (2002-10-01), Egerer et al.
patent: 6476633 (2002-11-01), Yokomizo
patent: 6489799 (2002-12-01), Murakami
Bracewell & Patterson LLP
Cuneo Kamand
Tang Minh N.
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