Low-noise CMOS active pixel having control signals...

Radiant energy – Photocells; circuits and apparatus – Photocell controlled circuit

Reexamination Certificate

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C250S2140RC

Type

Reexamination Certificate

Status

active

Patent number

06664530

Description

ABSTRACT:

CROSS REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims priority from prior French Patent Application No. 0107349, filed May 28, 2001, the disclosure of which is hereby incorporated by reference in its entirety.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to the field of image sensors with CMOS active pixels and more particularly to a low-noise CMOS active pixel.
2. Description of Related Art
At present, the main limitation of image sensors with CMOS active pixels lies in the presence of a reset noise in the electrical signals produced by the pixels of the sensor. This reset noise is troublesome because it is preponderant over the other noises in the signal-acquisition analog chain.
A classic CMOS active pixel essentially comprises a photosensitive element, such as a photodiode, associated with three transistors, a selection transistor to select the pixel, a transistor to reset the electrical charge of the photosensitive element and a read transistor to deliver a signal representing the electrical charge of the photodiode before and after the resetting of the pixel. The structure of a CMOS active pixel of this kind is shown in FIG.
1
. The photosensitive element, referenced PD, is represented by its capacitance Cp. A reset transistor MR is connected between a power supply terminals VDD and the photosensitive element. This transistor is connected to the photosensitive element at a point known as a photosensitive node. This photosensitive node is furthermore connected to a gate of a read transistor MD. The drain of the transistor MD is connected to the power supply terminal VDD and its source is connected to the drain of a selection transistor MS. Finally, the drain of the transistor MS is connected to an output terminal S of the pixel. To select this pixel, a signal SEL is applied to the gate of the transistor MS.
A CMOS active pixel of this kind works as follows: during a reset phase (when the RESET signal is active), the potential of the photosensitive element is reset at a fixed value V
0
. Then, under the effect of a light signal, the electrical charge of the photosensitive element is modified, and the voltage at its terminals then goes from V
0
to V
0
+Vsignal, Vsignal representing the number of incident photons received by the pixel. A method known as the CDS (Correlated Double Sampling) method is then used to read the value Vsignal. In this method, the signal is read at the output of the pixel before and after the resetting of the pixel and then the difference between the two signals is computed to deduce Vsignal therefrom.
A first drawback of this pixel structure is that the reset phase gives rise to a reset noise in the photosensitive element. This noise is higher as the capacitance of the photodiode is low. The root-mean-square value of this noise is given by the following formula:
B
=
kT
C
P
where k is the Boltzmann constant, T is the absolute temperature and C
P
is the capacitance of the photodiode. With a capacitance C
P
of 3 femtofarads, the root-mean-square value of the noise is 1.2 mV at a temperature of 300 Kelvin. Accordingly, a need exists to reduce this reset noise.
With this type of CMOS active pixel, there is, furthermore, direct coupling between the voltage power supply source VDD and the photosensitive node by means of the drain-gate capacitance of the read transistor. A power supply noise then gets added to the reset noise in the photodiode.
Accordingly, a further need exists to reduce the power supply noise given to the photodiode, namely to improve the power supply rejection ratio of the pixel.
Furthermore, the use of a MOS transistor as a switch to reset the pixel produces an injection of electrical charges into the photodiode: after the transistor passes into its off state, a portion of the electrical charges forming the channel of the MOS transistor is located in the capacitance of the diode. The variation in voltage resulting from this is especially high as the capacitance of the photodiode is low. This phenomenon further reduces the voltage swing of the output signal which is already limited by the generally low value of the power supply voltage and will be increasingly limited, given the current progress of technologies in this field. Accordingly, yet another need exists to reduce this phenomenon of the injection of electrical charges into the photodiode.
Yet still another problem is lag. Lag appears when the reset phase is unable to totally erase the information acquired in the photodiode during the previous reading phase. Lag is expressed on the screen by a persistence of the image: the image read contains a residue of the previous image. This problem appears when a limited bandwidth reset technique is used. Accordingly, a need exists to overcome this problem of lag.
A known approach used to limiting reset noise is presented in Pain, Yang, Ortiz, Wrigley, Hancock and Cunningham, “Analysis And Enhancement Of Low-Light-Level Performance Of Photodiode-Type CMOS Active Pixel Imagers Operated With Sub-Threshold Reset”, IEEE Workshop on CCDs and AIS, Nagano (Japan), pp 140-142, June 1999. The technique presented in this document, known as the “Hard Then Soft Reset” technique, consists of the use of a reset transistor working below its conduction threshold. The results presented in this document are useful in terms of power supply rejection, electrical charge injection, and the reduction of lag. However, this technique reduces reset noise only by a factor of two.
Another approach is presented in Fowler, Godfrey, Balicki and Canfield, “Low Noise Readout Using Active Reset For CMOS Aps” Proceedings of SPIE, vol. 3965, pp 126-135, 2000. According to the technique presented by Fowler et al., the photodiode is reset by using an amplifier to obtain a negative feedback of the reset noise. This technique is very valuable but has many drawbacks. In particular, it entails a large number of transistors (six transistors) per pixel, the need for a high power supply voltage because there are several cascade-mounted transistors, the need for a noise-free voltage ramp, and a mode of implementation which is difficult to render compatible with a matrix of pixels. Accordingly, a need exists to overcome this problem as well.
SUMMARY OF THE INVENTION
The present invention provides to a low-noise CMOS active pixel for an image sensor comprising a photosensitive element, such as a photodiode, whose electrical charge is reset during a reset phase and read during a read phase. The photosensitive element is connected between a photosensitive node and the ground. The CMOS active pixel device further comprises:
a first amplifier active during the reset phase, the first amplifier including:
an inverter input connected to the photosensitive node;
a non-inverter input connected to a first reference voltage source; and
an output;
a first switch and second switch connected in series, the first switch and the second switch connected between the inverter input and the output of the first amplifier, wherein the first switch is controlled by a first control signal and the second switch is controlled by a second control signal;
wherein the first control signal is active during a first time period of the reset phase;
wherein the second control signal is active during the first time period and a second time period of the reset phase;
wherein the first control signal and the second control signals are inactive during a third time period of the reset phase and during the read phase;
a capacitive feedback element parallel-mounted on the first switch; and a second amplifier mounted as a follower with an input connected to the photosensitive node and an output providing a signal representing an electrical charge of the photosensitive element during the read phase, and the second amplifier active during the read phase.
According to a preferred embodiment, the first and second amplifiers are formed by a first transistor whose gate is connected to the photosensitive node and whose source is connected to the refe

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