Circuit for capturing frame sync signal in receiver

Pulse or digital communications – Synchronizers

Reexamination Certificate

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Details

C375S355000, C375S368000, C375S343000, C370S206000, C329S304000

Reexamination Certificate

active

06625239

ABSTRACT:

TECHNICAL FIELD
The present invention relates to a frame-synchronizing-signal capturing circuit of a receiver, particularly to a frame-synchronizing-signal capturing circuit of a receiver for capturing a frame-synchronizing-signal portion in two series of I and Q symbol-stream data obtained by receiving and demodulating a signal to be PSK-modulated in which a BPSK-modulated frame-synchronizing signal or a BPSK-modulated frame-synchronizing signal and a superframe-identifying signal, an 8PSK-modulated digital signal, a QPSK-modulated digital signal, and a BPSK-modulated digital signal are time-multiplexed in accordance with a hierarchical transmission system or the like.
BACKGROUND ART
Practical use of digital satellite TV broadcast is advanced which conforms to a plurality of modulation systems having required C/Ns different from each other such as hierarchical transmission systems in which a wave to be 8PSK-modulated, a wave to be QPSK-modulated, and a wave to be BPSK-modulated are time-multiplexed and repeatedly transmitted every frame.
FIG. 7
is an illustration showing a frame configuration of a hierarchical transmission system. One frame is constituted of a frame-synchronizing-signal interval comprising 32 BPSK-modulated symbols, a TMCC (Transmission and Multiplexing Configuration Control) signal interval comprising 128 BPSK-modulated symbols to identify a transmission multiple configuration, a superframe-identifying signal interval comprising 32 symbols, a main signal interval of 203 8PSK(trellis-coding-8PSK)-modulated symbols, a burst symbol signal (BS) interval of four symbols in which a pseudo random noise (PN) signal is BPSK-modulated, a main signal interval of 203 8PSK(trellis-codec-8PSK)-modulated symbols, a burst symbol signal (BS) interval of four symbols in which a pseudo random noise (PN) signal is BPSK-modulated, a main signal interval of 203 QPSK-modulated symbols, a burst symbol signal (BS) interval of four symbols in which a pseudo random noise (PN) signal is BPSK-modulated, a main signal interval of 203 QPSK-modulated symbols, and a burst symbol signal (BS) interval of four BPSK-modulated symbols in order.
FIG. 8
is an illustration showing a superframe configuration according to the hierarchical transmission system. One superframe is constituted of 8 consecutive frames and a superframe-identifying signal serves as information for identifying a superframe. The 192 symbols from the head of a frame-synchronizing-signal interval up to the end of a superframe-identifying-signal interval are also referred to as a header.
The first-half 20 symbols of a frame-synchronizing-signal interval of 32 symbols are actually used as a frame-synchronizing signal. This is because the first-half 20 symbols in a 32-symbol interval to be originally used for another purpose serve as a unique word and the unique word is used as a frame-synchronizing signal. A frame-synchronizing signal comprising the 20 symbols is also referred to as “W
1
” which is shown by the following expression.
W1
=
(
S0S1







S18S19
)
=
(
11101100110100101000


)
(This is transmitted from the S
0
side.)
Similarly, the first-half 20 symbols of a superframe-identifying signal of 32 symbols are actually used as a superframe-identifying signal. This is also because the first-half 20 symbols of a 32-symbol interval to be originally used for another purpose serve as a unique word and the unique word is used as a superframe-identifying signal. The first frame of a superframe in the superframe-identifying signal comprising 20 symbols is also referred to as “W
2
” which is shown by the following expression.
W2
=
(
U0U1







U18U19
)
=
(
00001011011001110111


)
(This is transmitted from the U
0
side.)
Frames other than the first frame of a superframe in a superframe-identifying signal are also referred to as “W
3
” which is obtained by inverting each bit of W
2
and W
3
is shown by the following expression.
W3
=
(
V0V1







V18V19
)
=
(
11110100100110001000


)
(This is transmitted from the V
0
side.)
Then, mapping for each modulation system at the transmission side is described below by referring to
FIGS. 9A
to
9
C.
FIG. 9A
shows signal point arrangements on I-Q phase plane (also referred to as I-Q vector plane or I-Q signal space diagram) when using 8PSK for a modulation system. The 8PSK modulation system transmits a three-bit digital signal (abc) by one symbol and combinations of bits constituting one symbol include such eight ways as (000), (001), (010), (011), (100), (101), (110), and (111). These three-bit digital signals are converted into signal point arrangements “
0
” to “
7
” on the transmission-side I-Q phase plane in FIG.
9
A and this conversion is referred to as 8PSK mapping.
In case of the example shown in
FIG. 9A
, a bit string (000) is converted into a signal point arrangement “
0
”, a bit string (001) into a signal point arrangement “
1
”, a bit string (011) into a signal point arrangement “
2
,” a bit string (010) into a signal point arrangement “
3
”, a bit string (100) into a signal point arrangement “
4
”, a bit string (101) into a signal point arrangement “
5
”, a bit string (111) into a signal point arrangement “
6
”, and a bit string (1 10) into a signal point arrangement “
7
”.
FIG. 9B
shows signal point arrangements at I-Q phase plane when using QPSK for a modulation system. The QPSK modulation system transmits a two-bit digital signal (de) by one symbol and combinations of bits constituting the symbol include such four ways as (00), (01), (10), and (11). In case of the example in
FIG. 9B
, a bit string (00) is converted into a signal point arrangement “
1
,” a bit string (01) into a signal point arrangement “
3
”, a bit string (11) into a signal point arrangement “
5
”, and a bit string (10) into a signal point arrangement “
7
”.
FIG. 9C
shows signal point arrangements at the time of using BPSK for a modulation system. The BPSK modulation system transmits a one-bit digital signal (f) by one symbol. In case of the digital signal (f), bit (
0
) is converted into a signal point arrangement “
0
” and bit (
1
) is converted into a signal point arrangement “
4
”. Relations between signal point arrangements and arrangement numbers of various modulation systems are made same on the basis of 8BPSK.
I-axis and Q-axis of each of QPSK and BPSK of the hierarchical transmission system coincide with I-axis and Q-axis of 8PSK.
In case of a receiver for receiving a digital wave to be modulated (wave to be PSK-modulated) according to the hierarchical transmission system, as shown in
FIG. 10
, an intermediate-frequency signal IF of a signal received by a not-illustrated receiving circuit is demodulated by a demodulating circuit
1
and thus, I and Q base-band signals (hereafter also referred to as I and Q symbol-stream data) showing instantaneous values of I-axis and Q-axis orthogonal to each other for each symbol are obtained. When a frame-synchronizing signal is repeatedly captured every certain frame cycle from the demodulated I and Q base-band signals by a frame-sync detecting/regenerating circuit
2
, it is judged that frame sync is established and thus, a frame-synchronizing pulse FSYNC is output or a regenerated frame-synchronizing signal is output.
Furthermore, after establishing the frame sync, the present rotation angle of the received signal can be obtained from the signal points arrangement of the frame-synchronizing part in the I, Q base-band signals captured by a frame sync detecting/regenerating circuit
2
. And, any desired absolute phasing corresponding to the phase angle of a transmission signal can be established by reversely phase-rotating the I, Q base-band signals on the basis of the obtained rotation angle of the received signal.
Moreover, after frame sync is established, transmission-multiple-configuration identifying information (refer to TMCC in
FIG. 7
) is separated and it is identified in which modulation-system port

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