Semiconductor structure

Metal treatment – Process of modifying or maintaining internal physical... – Chemical-heat removing or burning of metal

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148172, 148187, 136 89SG, 29572, 357 16, H01L 21208

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active

041781953

ABSTRACT:
A technique for fabricating a semiconductor heterostructure by growth of a ternary semiconductor on a binary semiconductor substrate from a melt of the ternary semiconductor containing less than saturation of at least one common ingredient of both the binary and ternary semiconductors wherein in a single temperature step the binary semiconductor substrate is etched, a p-n junction with specific device characteristics is produced in the binary semiconductor substrate by diffusion of a dopant from the melt and a region of the ternary semiconductor of precise conductivity type and thickness is grown by virtue of a change in the melt characteristics when the etched binary semiconductor enters the melt.

REFERENCES:
patent: 3631836 (1972-01-01), Jarvela et al.
patent: 3874952 (1975-04-01), Woodall
patent: 3891478 (1975-06-01), Ladany et al.
patent: 4012242 (1977-03-01), Matare

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