Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Bipolar transistor
Reexamination Certificate
2000-11-22
2003-05-13
Tran, Minh Loan (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Heterojunction device
Bipolar transistor
C257S592000, C257S593000
Reexamination Certificate
active
06563147
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a bipolar transistor and a manufacturing method thereof, and more particularly, to a bipolar transistor suitable for high-frequency operation and a manufacturing method for manufacturing such a transistor.
2. Description of the Background Art
FIG. 13
is a cross-sectional view showing a conventional bipolar transistor manufactured so as to be able to operate at a given high frequency. The bipolar transistor shown in
FIG. 13
is provided with a silicon substrate
10
made up from a p
−
-type semiconductor. An n
+
-type diffusion layer
12
made up from an n
+
-type semiconductor and a p-type diffusion layer
14
made up from an p-type semiconductor are formed within the silicon substrate
10
. Further, an n-type silicon layer
16
made up from an n-type semiconductor is laid on the n
+
-type diffusion layer
12
and the p-type diffusion layer
14
. A field oxide film
17
for separating individual active regions of the transistor from one another is laid on the surface of the n-type silicon layer
16
.
An n
+
-type collector lead layer
18
of an n
+
-type semiconductor and an element isolation p-type diffusion layer
20
of a p-type semiconductor are formed within the n-type silicon layer
16
. The n
+
-type collector lead layer
18
is formed in the areas of the n
−
-type silicon layer
16
that are not covered with the field oxide film
17
, and the surface of the n
+
-collector lead layer
18
is covered with a thin oxide film
19
. The element isolation p-type diffusion layer
20
is formed on the p-type diffusion layer
14
.
A base diffusion layer
22
made up from a p-type semiconductor is formed in an active region of the n
−
-type silicon layer
16
. An emitter diffusion layer
24
made up from an n-type semiconductor is formed in the vicinity of the center of the base diffusion layer
22
. A base lead electrode
26
is formed from doped polysilicon on the base diffusion layer
22
so as not to conduct with the emitter diffusion layer
24
. An emitter electrode
28
is formed from doped polysilicon on the emitter diffusion layer
24
. An oxide film
30
is interposed between the base lead electrode
26
and the emitter electrode
28
for isolating them from each other.
The entire surface of the bipolar transistor is coated with an insulating film
32
. In the insulating film
32
, there are formed a contact hole communicating with the n
+
-type collector lead layer
18
, a contact hole communicating with the emitter electrode
28
, and a contact hole communicating with the base lead electrode
26
. A metal interconnection
40
is connected to the n
+
-type collector lead layer
18
by way of a plug
34
formed in the corresponding contact hole; a metal interconnection
42
is connected to the emitter electrode
28
by way of a plug
36
formed in the corresponding contact hole; and a metal interconnection
44
is connected to the base lead electrode
26
by way of a plug
38
formed in the corresponding contact hole.
In order to cause the bipolar transistor to operate at a high frequency, it is better to make base-to-collector capacitance low. The parasitic capacitance becomes greater as the boundary area between the base diffusion layer
22
and the n
−
-type silicon layer
16
becomes larger. Accordingly, it is desirable to make the boundary area small in order to cause the transistor to operate at high frequency.
The structure shown in
FIG. 13
is also called a double polysilicon self-aligned structure. The double polysilicon self-aligned structure comprises base lead electrode
26
, and the emitter electrode
28
formed inside the base lead electrode
26
in a self-aligned manner. This structure brings the emitter electrode
28
and the base lead electrode
26
in very close proximity to each other while preventing a short circuit from arising therebetween. The structure shown in
FIG. 13
makes the boundary area between the base diffusion layer
22
and the n
−
-type silicon layer
16
sufficiently small, thereby diminishing the base-to-collector parasitic capacitance.
Further, the structure shown in
FIG. 13
renders a distance between the emitter diffusion layer
24
and the base lead electrode
26
sufficiently small, thereby diminishing the resistance of the base region to a sufficiently small value. As has been mentioned, the structure shown in
FIG. 13
is suitable for causing the bipolar transistor to operate at high frequency.
However, the limit of the cut-off frequency that can be attained by the structure shown in
FIG. 13
is said to be in the range of 30 to 40 GHz. The structure shown in
FIG. 13
does not enable realization of a transistor having a greatly superior high-frequency characteristic.
Shortening a time required for carriers to run through the base region by means of reducing the width of the base region (i.e., by reducing the thickness of the base diffusion layer
24
shown in
FIG. 13
) is effective for increasing the operation speed of the bipolar transistor. However, if the width of the base region is reduced, punch-through becomes likely to arise in the transistor.
Increasing the impurity content of a base diffusion layer makes punch through unlikely to arise in a bipolar transistor. However, the current gain of the bipolar transistor drops as the impurity content of the base diffusion layer becomes high. For this reason, a practical bipolar transistor cannot be realized by means of increasing simply the impurity content of the base diffusion layer.
A technology for constituting a bipolar transistor through use of a hetero-junction has already been known as a technique for solving the above-described drawback of the conventional bipolar transistor. Such a hetero-junction bipolar transistor (HBT) is described in, for example, IEEE TRANSACTIONS ON ELECTRON DEVICES Vol. 42, No. 3 (1995), pp. 455 to 482. However, all HBTs that have already been proposed require very complicated manufacturing processes and are unsuitable for mass production.
SUMMARY OF THE INVENTION
The present invention has been conceived to solve the foregoing drawbacks of the background art and is aimed at providing a bipolar transistor which can be readily fabricated through simple processes, as well as a corresponding manufacturing method.
The present invention is also aimed at providing a method of readily and accurately manufacturing a base lead electrode and an emitter diffusion layer by means of the self-alignment technique.
The present invention has been conceived to solve the drawback set forth and is aimed at providing an HBT that can be readily manufactured through simple processes.
Further, the present invention is aimed at providing a method that enables simple manufacture of an HBT.
The above objects of the present invention are achieved by a bipolar transistor described below. The transistor includes a first-type silicon layer provided on the surface of a silicon substrate so as to contain impurities of first conductivity type. A first-type silicon epitaxial layer is provided on the first-type silicon layer so as to contain impurities of first conductivity type. A second-type SiGe epitaxial layer which contains impurities of second conductivity type at a first concentration is provided on the first-type silicon epitaxial layer so as to contain germanium at a predetermined concentration profile. A second-type silicon epitaxial layer is provided on the second-type SiGe epitaxial layer so as to contain impurities of second conductivity type at a second concentration lower than the first concentration. The germanium content in the second-type SiGe epitaxial layer becomes higher in the vicinity of a boundary region between the second-type SiGe epitaxial layer and the first-type silicon epitaxial layer than in a boundary region between the second-type SiGe epitaxial layer and the second-type silicon epitaxial layer.
The above objects of the present invention are achieved by a method of manufacturing a
Dickey Thomas L
McDermott & Will & Emery
Tran Minh Loan
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