Soft switching DC-to-DC converter and controlling method...

Details Soft switching DC-to-DC converter and controlling method... Soft switching DC-to-DC converter and controlling method...

2001-03-15

2003-09-02

Riley, Shawn (Department: 2838)

Electricity: power supply or regulation systems

Output level responsive

Using a three or more terminal semiconductive device as the...

C323S224000

Reexamination Certificate

active

06614208

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of Invention
This invention relates to zero-voltage or zero-current switching (“soft switching”) of DC-to-DC converters comprising at least a pair of switching devices.
2. Description of Related Art
DC-to-DC converters are used to obtain a specified DC voltage in a power circuit. Noise and power losses occur in DC-to-DC converters when turning-on and turning-off the switching devices. The soft switching technique is known, so far, for decreasing noise and power losses. Resonant DC-to-DC converter and inductor commutating circuits, etc. are proposed as a means to achieve soft switching.
For instance, Japanese Patent Unexamined Publication 7-46853 discloses a half-bridge soft switching inverter and controlling method thereof. Soft switching inverter
64
of the publication is shown in
FIG. 10. A
pair of switching devices Q
1
and Q
2
are connected in series between +E
0
volt and −E
0
volt. Output filter
22
is connected to output node a. Load (Z
L
)
24
is connected to output node b of output filter
22
. Capacitors C
1
, C
2
, and diodes D
1
, D
2
are connected to the switching devices Q
1
and Q
2
in parallel at both ends of Q
1
and Q
2
, respectively. Output filter
22
is composed of inductor L
F
, connected between output node a and output node b, and capacitor C
F
connected between output node b and ground. Load
24
is connected between output node b and ground. Inverter controller
64
can output an objective DC voltage between +E
0
and −E
0
volt, as an output voltage, by switching the switching devices Q
1
and Q
2
in a timely manner. However, direct current flows from +E
0
to −E
0
, when the both switching devices Q
1
and Q
2
turn on at the same time. As a result, power loss becomes very large, and the switching devices Q
1
and Q
2
suffer damages.
In an attempt to overcome the problems described above, it is generally known to have a dead time, that turns off both the switching devices Q
1
and Q
2
simultaneously, in switching the Q
1
and Q
2
.
Output voltage of output node a of the inverter controller
64
, having an ideal dead time, is shown in FIG.
5
. The voltage of output node a changes by switching of Q
1
, Q
2
, and resonating of the inductor L
F
and the capacitor C
F
. The output voltage of output node a for the period of dead time changes along with the electrical charge and discharge of capacitors C
1
and C
2
connected with Q
1
and Q
2
in parallel, respectively. These voltage changes are very rapid compared with the voltage changes in the period when Q
1
or Q
2
is turned on.
FIG. 6
shows voltages of switching devices Q
1
and Q
2
, output voltage VSx of the node a, flowing currents in Q
1
and Q
2
and the time differentiated signal output voltage dVSx/dt, when the dead time A is shorter than an ideal period. At the moment Q
1
turns on earlier than the ideal dead time A, the output node a is pulled up rapidly. As a result, an excessive current momentarily flows in Q
1
.
On the contrary, when the dead time A is longer than the ideal period as shown in FIG.
7
and Q
1
remains turned-off longer than the ideal period, the output voltage VSx of node a becomes higher than the power-supply voltage. Afterwards, at the moment Q
1
turns on, the output voltage of node a is pulled down rapidly. As a result, an excessive current momentarily flows in Q
1
.
A similar phenomenon occurs on the switching device Q
2
as shown in
FIGS. 8 and 9
.
Japanese Patent Unexamined Publication 7-46853 discloses that when the output voltage of node a becomes equal to a certain set reference voltage, then the switching device Q
1
or Q
2
is turned on. Therefore, switching noise and switching power losses can be decreased by above mentioned zero voltage switching.
However, when there is a rapid pull-up and rapid pull-down in the current value flowing in the switching devices Q
1
and Q
2
as shown in
FIGS. 6 through 9
, it is very difficult to determine when the output voltage of node a is equal to the set reference voltage. Also, it is difficult to measure the output voltage with high accuracy, and with high speed. Therefore, it was very difficult to achieve the teaching of 7-46853, realistically.
SUMMARY OF THE INVENTION
This invention provides a soft switching DC-to-DC converter usable to reduce noise and power losses attributed to the turning on and turning off of switching devices. The present invention substantially eliminates the over current flow attributed to a switching device turning on before the end of the dead time period, or a switching device remaining off beyond the dead time period. This invention separately provides a method for controlling a DC-to-DC converter.
In various exemplary embodiments the DC-to-DC converter includes a switching circuit, error amplifier, pulse-width modulator, differentiator and dead time adjusting circuit. The error amplifier compares a voltage output to a reference voltage, and generates a comparison result. The pulse-width modulator adjusts the output pulse in accordance with the comparison result from the error amplifier. The differentiator outputs a differentiated signal dVSx/dt of the output voltage VSx of the switching circuit. The differentiated signal dVSx/dt outputs a signal that indicates whether there has been an over current in either the positive or negative direction. Typically, the over current flow will generate a peak in the differentiated signal. The dead time adjusting circuit adjusts the dead time period when it detects a spike or peak in the differentiated signal dVSx/dt to obtain the appropriate dead time period.
These and other features and advantages of this invention are described in, or apparent from, the following detailed description of the devices and methods according to this invention.


REFERENCES:
patent: 4265200 (1981-05-01), Wessel et al.
patent: 4581569 (1986-04-01), Fujioka et al.
patent: 5262932 (1993-11-01), Stanley et al.
patent: 5777461 (1998-07-01), Massie et al.
patent: 5801519 (1998-09-01), Midya et al.
patent: 5872710 (1999-02-01), Kameyama
patent: 5933344 (1999-08-01), Mitsuishi et al.
patent: 7046853 (1995-02-01), None
“Inverters without transformer in grid connected photovoltaic applications”, Proceedings of 6thEuropean Conference on Power Electronics and Application (EPE '95), vol. 3, Sevilla, Sep. 1995, pp. 3.086-3.091.

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