Process for preparing a semiconductor device with a narrow-chann

Details Process for preparing a semiconductor device with a narrow-chann Process for preparing a semiconductor device with a narrow-chann

1992-10-08

1996-01-16

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 29, 437 69, 437 36, H01L 21265

Patent

active

054847427

ABSTRACT:
A second photo-resist film 6a is formed on first photo-resist film 5a which functions as a mask for etching an oxidation resistant silicon nitride film 3 in a region in which a narrow-channel MOS transistor is to be formed. Ions having p-type are implanted into the surface of a substrate 1 using the first photo-resist film 5a and the second photo-resist film 6a as the masking, to selectively form a p-type ion-implanted layer 7. Then, with heating process, a channel stopper 9a and field oxidation layers 8 are formed, whereby element forming regions partitioned by the field oxidation layers 8 are provided. In this manner, it is possible, at least in the region in which the narrow-channel MOS transistor is to be formed, that the channel stopper is prevented from spreading into the channel region and thereby the reduction of the channel width is prevented.

REFERENCES:
patent: 4749662 (1988-06-01), Custode et al.
patent: 5132241 (1992-07-01), Su
patent: 5183773 (1993-02-01), Miyata
patent: 5242841 (1993-09-01), Smayling et al.

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