Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
1999-08-30
2003-04-01
Nguyen, Vinh P. (Department: 2829)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
C324S765010
Reexamination Certificate
active
06541987
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to defect analysis in semiconductor device assemblies, and more particularly to techniques for accurately analyzing defects within semiconductor devices using laser scanning microscopes.
BACKGROUND OF THE INVENTION
The semiconductor industry has seen tremendous advances in technology in recent years that have permitted dramatic increases in circuit density and complexity, and equally dramatic decreases in power consumption and package sizes. Present semiconductor technology now permits single-chip microprocessors with many millions of transistors, operating at speeds of tens (or even hundreds) of MIPS (millions of instructions per second) to be packaged in relatively small, air-cooled semiconductor device packages. A by-product of such high-density and high functionality in semiconductor devices has been an increased demand in the numbers of external electrical connections present on the exterior of the die and on the exterior of the semiconductor packages which receive the die, in order to connect the packaged device to external systems, such as a printed circuit board.
Typically, dies contain a bonding pad which makes the electrical connection to the semiconductor package. To shorten the electrical path to the pad, the bonding pads were moved to the side of the die nearest the transistors and other circuit devices formed in the die. Connection to the package is made when the chip is flipped over and soldered. As a result, the dies are commonly called flip chips in the industry. Each bump on a pad connects to a corresponding package inner lead. The resulting packages are lower profile and have lower electrical resistance and a shortened electrical path. The plurality of ball-shaped conductive bump contacts (usually solder, or other similar conductive material) are typically disposed in a rectangular array. These packages are occasionally referred to as “Ball Grid Array” (BGA) or “Area Grid Array” packages.
A typical BGA package is characterized by a large number of solder balls disposed in an array on a surface of the package. It is not uncommon to have hundreds of solder balls in an array. The BGA package is assembled to a matching array of conductive pads. The pads are connected to other devices within a substrate or circuitry on a circuit board. Heat is applied to reflow the solder balls (bumps) on the package, thereby wetting the pads on the substrates and, once cooled, forming electrical connections between the package and the semiconductor device contained in the package and the substrate.
The introduction of flip chips and Ball Grid Array (BGA) packages to the semiconductor industry has brought several new manufacturing and assembly challenges. One of the more significant problems is finding an efficient, cost-effective technique for analyzing the flip chips and BGA packages for defects.
One method for detecting defects in a circuit includes the use of Light Induced Voltage Alteration (LIVA). LIVA requires that a beam of electromagnetic radiation, typically a laser, be directed at a circuit. The electromagnetic radiation causes a change in voltage within the circuit. This change in voltage is measured and used as an indication of a defect, such as a short.
Another method for detecting defects in a circuit includes the use of a photoemission microscope to view a circuit that is powered. Defects within the powered circuit give off a photoemission, which is then recorded with the photoemission microscope. The difficulty in using this method is that in some cases the location of the defect must be known prior to the use of a photoemission microscope.
As more capability is being designed into electronic devices, such as memory chips and microprocessor chips, the number of input/output elements, pads, and connections between other devices are being vastly increased. Therefore, a controlled and efficient process for analyzing defects is becoming even more important.
SUMMARY OF THE INVENTION
The method described herein involves the use of a laser to scan the back side of a semiconductor, such that it excites all of the nodes within the semiconductor. The laser excites the nodes within the semiconductor by exposing the nodes to laser light, which causes the nodes to absorb a photon. When there is a defect, such as a short in the circuit, those nodes associated with a defect give off a photoemission of a different wavelength than the photoemission given off by non-defective semiconductors. The photoemission is then recorded with a photoemission microscope. The ability to scan an entire surface and discover a defect, rather than having to know beforehand where the defect is located, is an improvement upon the efficiency of the defect analysis of semiconductors.
In one embodiment of the invention, a method for analyzing a circuit in a semiconductor device is achieved by directing a laser beam having a known wavelength at a target material in the semiconductor device, receiving a secondary photoluminescent (PL) component remitted by the target material, and, therefrom, detecting a contaminant in the target material.
In another example embodiment, a method for analyzing an electronic circuit is formed upon a front side surface of a semiconductor device having opposing front side and back side regions. The method comprises scanning the back side surface with a laser beam having a known wavelength and detecting a photoemission response from the electronic circuit. The wavelength of the response from defective semiconductors is different from the wavelength of the response from non-defective semiconductors.
In yet another example embodiment, a system for analyzing an electronic circuit comprises a test fixture that is arranged to secure a die which includes the electronic circuit and an LSM that is arranged to direct a laser beam at a target material in the die and receive a secondary photoluminscent (PL) component which may be remitted from the target material.
REFERENCES:
patent: 5334540 (1994-08-01), Ishii
patent: 5541416 (1996-07-01), Washizula
patent: 6081127 (2000-06-01), Wagner et al.
Sidney Perkowitz, “Optical Characterization of Semiconductors: Infrared, Raman, and Photoluminescence Spectroscopy,” Academic Press Limited, 1993, pp. 1-4, 50-57, 61-65, 74-83, 105-109, (month unavailable).
Advanced Micro Devices , Inc.
Nguyen Vinh P.
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