DRAM having a large dielectric breakdown voltage between an adja

Fishing – trapping – and vermin destroying

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437 47, 437 48, 437 60, 437981, H01L 2170

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active

052721035

ABSTRACT:
An upper electrode of a capacitor is structured to have its end surface recessed from an end surface of an interlayer insulating layer covering a surface of said electrode layer, at a position where the upper electrode faces a bit line contact portion. The upper electrode layer and the first interlayer insulating layer are patterned to have the same end surface shape. Subsequently, only a side surface of the upper electrode layer is etched and recedes by isotropic etching. The receding surface of the upper electrode layer and a side surface of said interlayer insulating layer are covered with a sidewall insulating layer. The bit line contact portion or a pad layer for a bit line contact is formed along a surface of the sidewall insulating layer. The sidewall insulating layer is formed thick by an receding amount of the upper electrode of the capacitor from the first interlayer insulating layer. Thus, distance between the upper electrode of the capacitor and the bit line contact portion is increased, and therefore a dielectric breakdown voltage therebetween to is also increased.

REFERENCES:
patent: 4855801 (1989-08-01), Kuesters
patent: 5012310 (1991-04-01), Kimura et al.
patent: 5068707 (1991-11-01), Pors et al.

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