DC-DC converter, power supply circuit, method for...

Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...

Reexamination Certificate

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C323S274000, C323S276000

Reexamination Certificate

active

06611132

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a DC-DC converter, a power supply circuit, a method for controlling a DC-DC converter, and a method for controlling a power supply circuit.
Cellular phones have become compact. Power supply ICs used in power supply circuits of cellular phones thus have many outputs and are operated by low voltages. To prolong the life of batteries, the power consumption of the power supply circuits must be decreased.
FIG. 1
is a schematic circuit diagram of a prior art cellular phone power supply circuit
50
. The power supply circuit
50
includes a DC-DC converter
1
and a low dropout (LDO) regulator
7
.
In the DC-DC converter
1
, a switching control circuit
2
controls the switching of a p-channel MOS transistor (first output transistor) Tr
1
. In the DC-DC converter
1
, the switching of the first output transistor Tr
1
, an inductor
3
, a capacitor
4
, and a flyback diode
5
decrease a power supply voltage Vp to generate a first dropped voltage Vo
1
. A power supply terminal (not shown) of the LDO regulator
7
is supplied with the first output voltage Vo
1
from a node N
1
between the inductor
3
and the capacitor
4
.
The LDO regulator
7
includes a p-channel MOS transistor (second output transistor) Tr
2
, which goes on in accordance with a comparison output signal of a comparator
8
. In this state, the LDO regulator
7
decreases the first output voltage Vo
1
to generate a second output (dropped) voltage Vo
2
. A load circuit (not shown) is supplied with the second output voltage Vo
2
.
The second output voltage Vo
2
is divided by a first resistor R
1
and a second resistor R
2
. The divided second output voltage Vo
2
is provided to a plus input terminal of the comparator
8
. An increase in the second output voltage Vo
2
increases the comparison output signal of the comparator
8
and decreases an output (load) current Io
2
of the second output transistor Tr
2
. A decrease in the second output voltage Vo
2
decreases the comparison output signal of the comparator
8
and increases the output current Io
2
of the second output transistor Tr
2
. Thus, the second output voltage Vo
2
is maintained at a predetermined voltage, which is determined by the first and second resistors R
1
, R
2
.
The switching control circuit
2
and the comparator
8
receive a control signal CNT. The control signal CNT goes low when the load circuit, which receives the first and second output voltages Vo
1
, Vo
2
, enters a standby state. The low control signal CNT inactivates the switching control circuit
2
and the comparator
8
and causes the first and second output transistors Tr
1
, Tr
2
to go off. This stops the supply of the first and second output voltages Vo
1
, Vo
2
.
The prior art portion of
FIG. 6
illustrates the behavior of the second output voltage Vo
2
when the power supply circuit
50
starts to receive power.
When a battery starts to supply power, the power supply voltage Vp supplied to the DC-DC converter
1
increases and the voltage of the control signal CNT increases synchronously with the power supply voltage Vp.
In the DC-DC converter
1
, the operation of the switching control circuit
2
is stopped and the first output transistor Tr
1
remains off until the power supply voltage Vp reaches a predetermined voltage V
1
. When the power supply voltage Vp increases to the predetermined voltage V
1
, the switching control circuit
2
starts to operate. This starts the switching of the first output transistor Tr
1
. In this state, the on time of the first output transistor Tr
1
is controlled so that it gradually becomes longer to prevent problems caused by sudden increase of the first output voltage Vo
1
. Thus, the first output voltage Vo
1
increases gradually. Subsequently, when the first output voltage Vo
1
increases to a further predetermined voltage V
2
, the comparator
8
of the LDO regulator
7
starts to operate and increases the second output voltage.
In the power supply circuit
50
, the switching control circuit
2
consumes consumption current I
1
when the switching control circuit
2
starts to operate as the control signal CNT goes high, and the comparator
8
consumes consumption current I
2
when the comparator
8
starts to operate.
The consumption currents I
1
, I
2
are constant when the control signal CNT goes high and the first and second output voltages Vo
1
, Vo
2
are output from the DC-DC converter
1
and the LDO regulator
7
. Accordingly, as shown in the prior art portion of
FIG. 6
, the total current consumption (I
1
+I
2
) Icc of the switching control circuit
2
and the comparator
8
is constant regardless of the amount of the load current Io
2
supplied to the load circuit by the LDO regulator
7
.
Therefore, as the load current Io
2
decreases, the ratio of the power consumed by the DC-DC converter
1
and the LDO regulator
7
increases. This decreases the efficiency of the power supply circuit
50
.
Additionally, when the power supply circuit
50
starts to receive power, the first output voltage Vo
1
increases gradually. This produces a relatively long delay time t
1
from when the supply of power starts to when the second output voltage Vo
2
increases to a predetermined level.
When the power supply circuit
50
is supplied with power, the first and second output transistors Tr
1
, Tr
2
go off when the control signal CNT goes low. This decreases the first and second output voltages Vo
1
, Vo
2
. When the control signal CNT goes high again, the first output voltage Vo
1
gradually increases. This produces a relatively long delay time t
3
from when the control signal CNT goes high to when the second output voltage Vo
2
increases to the predetermined level.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a DC-DC converter that decreases power consumption and quickly increases the output voltage.
To achieve the above object, the present invention provides a DC-DC converter including a voltage generation circuit for receiving a power supply voltage and generating an output voltage. The voltage generation circuit includes an output transistor for performing switching to generate the output voltage. A switching control circuit is connected to the voltage generation circuit to control the switching of the output transistor. A current detection circuit is connected to the voltage generation circuit to detect a load current derived from the output voltage of the voltage generation circuit to generate a detection signal. A stop control circuit is connected to the voltage generation circuit, the switching control circuit, and the current detection circuit to maintain the output transistor in an activated state in accordance with the detection signal and to stop the operation of the switching control circuit when the load current is less than or equal to a predetermined value.
A further perspective of the present invention is a power supply circuit including a DC-DC converter for receiving a power supply voltage and generating a first output voltage. The DC-DC converter includes a voltage generation circuit having a first output transistor. The first output transistor performs switching, and the voltage generating circuit generates the first output voltage in accordance with the switching of the first output transistor. A switching control circuit is connected to the voltage generation circuit to control the switching of the first output transistor. A voltage regulator is connected to the DC-DC converter to generate the second output voltage in accordance with the first output voltage. A current detection circuit detects a load current derived from the second output voltage of the voltage generation circuit to generate a first detection signal in accordance with the detected load current. A stop control circuit is connected to the voltage generation circuit, the switching control circuit, and the current detection circuit to maintain the output transistor in an activated state in accordance with the first detection signal and to stop the o

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